Searched refs:CLK_TOP_DISP_PWM_SEL (Results 1 - 12 of 12) sorted by relevance
| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 150 #define CLK_TOP_DISP_PWM_SEL 115 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt6765-clk.h | 150 #define CLK_TOP_DISP_PWM_SEL 115 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 93 #define CLK_TOP_DISP_PWM_SEL 83 macro
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| H A D | mt6765-clk.h | 150 #define CLK_TOP_DISP_PWM_SEL 115 macro
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| H A D | mt8192-clk.h | 45 #define CLK_TOP_DISP_PWM_SEL 33 macro
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mediatek,mt8365-clk.h | 93 #define CLK_TOP_DISP_PWM_SEL 83 macro
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| H A D | mt6765-clk.h | 150 #define CLK_TOP_DISP_PWM_SEL 115 macro
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| H A D | mt8192-clk.h | 45 #define CLK_TOP_DISP_PWM_SEL 33 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 431 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM_SEL, "disp_pwm_sel",
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| H A D | clk-mt8365.c | 471 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM_SEL, "disp_pwm_sel",
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| H A D | clk-mt8192.c | 626 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM_SEL, "disp_pwm_sel",
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt6765.c | 428 MUX_GATE_CLR_SET_UPD(CLK_TOP_DISP_PWM_SEL, "disp_pwm_sel",
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