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Searched refs:CLK_TOP_AUD1_SEL (Results 1 - 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt7622-clk.h92 #define CLK_TOP_AUD1_SEL 80 macro
H A Dmt8516-clk.h176 #define CLK_TOP_AUD1_SEL 144 macro
H A Dmt7629-clk.h107 #define CLK_TOP_AUD1_SEL 97 macro
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A Dmt7622-clk.h92 #define CLK_TOP_AUD1_SEL 80 macro
H A Dmt7629-clk.h107 #define CLK_TOP_AUD1_SEL 97 macro
H A Dmt8516-clk.h176 #define CLK_TOP_AUD1_SEL 144 macro
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A Dmt8516-clk.h176 #define CLK_TOP_AUD1_SEL 144 macro
H A Dmt7622-clk.h92 #define CLK_TOP_AUD1_SEL 80 macro
H A Dmt7629-clk.h107 #define CLK_TOP_AUD1_SEL 97 macro
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8516-clk.h176 #define CLK_TOP_AUD1_SEL 144 macro
H A Dmt7622-clk.h92 #define CLK_TOP_AUD1_SEL 80 macro
H A Dmt7629-clk.h107 #define CLK_TOP_AUD1_SEL 97 macro
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A Dclk-mt7622.c446 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt7629.c516 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt8516.c395 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt8167.c584 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A Dclk-mt8516.c393 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt7622.c575 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt7629.c541 MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
H A Dclk-mt8167.c583 MUX(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,

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