CLK_TOP_AES_FDE_SEL (reference) in projects: kernel - OpenGrok search results

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Searched refs:CLK_TOP_AES_FDE_SEL (Results 1 - 9 of 9) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	mt6765-clk.h	`158 #define CLK_TOP_AES_FDE_SEL 123 macro`
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A D	mt6765-clk.h	`158 #define CLK_TOP_AES_FDE_SEL 123 macro`
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A D	mediatek,mt8365-clk.h	`101 #define CLK_TOP_AES_FDE_SEL 91 macro`
H A D	mt6765-clk.h	`158 #define CLK_TOP_AES_FDE_SEL 123 macro`
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	mediatek,mt8365-clk.h	`101 #define CLK_TOP_AES_FDE_SEL 91 macro`
H A D	mt6765-clk.h	`158 #define CLK_TOP_AES_FDE_SEL 123 macro`
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A D	clk-mt6765.c	`457 MUX_GATE_CLR_SET_UPD(CLK_TOP_AES_FDE_SEL, "aes_fde_sel",`
H A D	clk-mt8365.c	`495 MUX_GATE_CLR_SET_UPD(CLK_TOP_AES_FDE_SEL, "aes_fde_sel",`
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A D	clk-mt6765.c	`454 MUX_GATE_CLR_SET_UPD(CLK_TOP_AES_FDE_SEL, "aes_fde_sel",`

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