| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 146 #define CLK_PERI_UART2 8 macro
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| H A D | mt8173-clk.h | 216 #define CLK_PERI_UART2 22 macro
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| H A D | mt2701-clk.h | 243 #define CLK_PERI_UART2 22 macro
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| H A D | mt2712-clk.h | 257 #define CLK_PERI_UART2 18 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 146 #define CLK_PERI_UART2 8 macro
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| H A D | mt8173-clk.h | 216 #define CLK_PERI_UART2 22 macro
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| H A D | mt2701-clk.h | 243 #define CLK_PERI_UART2 22 macro
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| H A D | mt2712-clk.h | 257 #define CLK_PERI_UART2 18 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 196 #define CLK_PERI_UART2 21 macro
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| H A D | mt8135-clk.h | 146 #define CLK_PERI_UART2 8 macro
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| H A D | mt8173-clk.h | 215 #define CLK_PERI_UART2 22 macro
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| H A D | mt2701-clk.h | 243 #define CLK_PERI_UART2 22 macro
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| H A D | mt2712-clk.h | 257 #define CLK_PERI_UART2 18 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt8173-pericfg.c | 72 GATE_PERI0(CLK_PERI_UART2, "peri_uart2", "axi_sel", 21),
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| H A D | clk-mt6795-pericfg.c | 61 GATE_PERI(CLK_PERI_UART2, "peri_uart2", "axi_sel", 21),
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| H A D | clk-mt8135.c | 457 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 24),
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| H A D | clk-mt2712.c | 903 GATE_PERI0(CLK_PERI_UART2, "per_uart2", "uart_sel", 22),
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| H A D | clk-mt2701.c | 834 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 21),
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 196 #define CLK_PERI_UART2 21 macro
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| H A D | mt8135-clk.h | 146 #define CLK_PERI_UART2 8 macro
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| H A D | mt8173-clk.h | 215 #define CLK_PERI_UART2 22 macro
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| H A D | mt2701-clk.h | 243 #define CLK_PERI_UART2 22 macro
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| H A D | mt2712-clk.h | 257 #define CLK_PERI_UART2 18 macro
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt8135.c | 467 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 24),
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| H A D | clk-mt2701.c | 839 GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 21),
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