CLK_PERI_UART0_SEL (reference) in projects: kernel

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Searched refs:CLK_PERI_UART0_SEL (Results 1 - 21 of 21) sorted by relevance

/kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	mt8135-clk.h	`180 #define CLK_PERI_UART0_SEL 42 macro`
H A D	mt8173-clk.h	`230 #define CLK_PERI_UART0_SEL 36 macro`
H A D	mt2701-clk.h	`268 #define CLK_PERI_UART0_SEL 45 macro`
/kernel/linux/linux-5.10/include/dt-bindings/clock/
H A D	mt8135-clk.h	`180 #define CLK_PERI_UART0_SEL 42 macro`
H A D	mt8173-clk.h	`230 #define CLK_PERI_UART0_SEL 36 macro`
H A D	mt2701-clk.h	`268 #define CLK_PERI_UART0_SEL 45 macro`
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A D	mediatek,mt6795-clk.h	`205 #define CLK_PERI_UART0_SEL 30 macro`
H A D	mt8135-clk.h	`180 #define CLK_PERI_UART0_SEL 42 macro`
H A D	mt8173-clk.h	`229 #define CLK_PERI_UART0_SEL 36 macro`
H A D	mt2701-clk.h	`268 #define CLK_PERI_UART0_SEL 45 macro`
/kernel/linux/linux-6.6/drivers/clk/mediatek/
H A D	clk-mt8173-pericfg.c	`42 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),`
H A D	clk-mt6795-pericfg.c	`33 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),`
H A D	clk-mt8135.c	`500 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),`
H A D	clk-mt2701.c	`877 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents,`
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	mediatek,mt6795-clk.h	`205 #define CLK_PERI_UART0_SEL 30 macro`
H A D	mt8135-clk.h	`180 #define CLK_PERI_UART0_SEL 42 macro`
H A D	mt8173-clk.h	`229 #define CLK_PERI_UART0_SEL 36 macro`
H A D	mt2701-clk.h	`268 #define CLK_PERI_UART0_SEL 45 macro`
/kernel/linux/linux-5.10/drivers/clk/mediatek/
H A D	clk-mt8135.c	`510 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),`
H A D	clk-mt2701.c	`882 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents,`
H A D	clk-mt8173.c	`725 MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1),`

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