| /kernel/linux/linux-5.10/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 158 #define CLK_PERI_AP_DMA 20 macro
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| H A D | mt8173-clk.h | 207 #define CLK_PERI_AP_DMA 13 macro
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| H A D | mt2701-clk.h | 234 #define CLK_PERI_AP_DMA 13 macro
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| H A D | mt2712-clk.h | 250 #define CLK_PERI_AP_DMA 11 macro
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| /kernel/linux/linux-5.10/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 158 #define CLK_PERI_AP_DMA 20 macro
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| H A D | mt8173-clk.h | 207 #define CLK_PERI_AP_DMA 13 macro
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| H A D | mt2701-clk.h | 234 #define CLK_PERI_AP_DMA 13 macro
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| H A D | mt2712-clk.h | 250 #define CLK_PERI_AP_DMA 11 macro
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| /kernel/linux/linux-6.6/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 187 #define CLK_PERI_AP_DMA 12 macro
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| H A D | mt8135-clk.h | 158 #define CLK_PERI_AP_DMA 20 macro
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| H A D | mt8173-clk.h | 206 #define CLK_PERI_AP_DMA 13 macro
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| H A D | mt2701-clk.h | 234 #define CLK_PERI_AP_DMA 13 macro
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| H A D | mt2712-clk.h | 250 #define CLK_PERI_AP_DMA 11 macro
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| H A D | clk-mt8173-pericfg.c | 63 GATE_PERI0(CLK_PERI_AP_DMA, "peri_ap_dma", "axi_sel", 12),
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| H A D | clk-mt6795-pericfg.c | 52 GATE_PERI(CLK_PERI_AP_DMA, "peri_ap_dma", "axi_sel", 12),
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| H A D | clk-mt8135.c | 469 GATE_PERI0(CLK_PERI_AP_DMA, "ap_dma_ck", "axi_sel", 12),
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| H A D | clk-mt2712.c | 896 GATE_PERI0(CLK_PERI_AP_DMA, "per_ap_dma", "axi_sel", 13),
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| H A D | clk-mt2701.c | 843 GATE_PERI0(CLK_PERI_AP_DMA, "ap_dma_ck", "axi_sel", 12),
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| /kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 187 #define CLK_PERI_AP_DMA 12 macro
|
| H A D | mt8135-clk.h | 158 #define CLK_PERI_AP_DMA 20 macro
|
| H A D | mt8173-clk.h | 206 #define CLK_PERI_AP_DMA 13 macro
|
| H A D | mt2701-clk.h | 234 #define CLK_PERI_AP_DMA 13 macro
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| H A D | mt2712-clk.h | 250 #define CLK_PERI_AP_DMA 11 macro
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| H A D | clk-mt8135.c | 479 GATE_PERI0(CLK_PERI_AP_DMA, "ap_dma_ck", "axi_sel", 12),
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| H A D | clk-mt2701.c | 848 GATE_PERI0(CLK_PERI_AP_DMA, "ap_dma_ck", "axi_sel", 12),
|