Home
last modified time | relevance | path

Searched refs:CKSEG1ADDR (Results 1 - 25 of 88) sorted by relevance

1234

/kernel/linux/linux-5.10/arch/mips/include/asm/
H A Dsni.h40 #define SNI_PORT_BASE CKSEG1ADDR(0xb4000000)
46 #define PCIMT_UCONF CKSEG1ADDR(0xbfff0004)
47 #define PCIMT_IOADTIMEOUT2 CKSEG1ADDR(0xbfff000c)
48 #define PCIMT_IOMEMCONF CKSEG1ADDR(0xbfff0014)
49 #define PCIMT_IOMMU CKSEG1ADDR(0xbfff001c)
50 #define PCIMT_IOADTIMEOUT1 CKSEG1ADDR(0xbfff0024)
51 #define PCIMT_DMAACCESS CKSEG1ADDR(0xbfff002c)
52 #define PCIMT_DMAHIT CKSEG1ADDR(0xbfff0034)
53 #define PCIMT_ERRSTATUS CKSEG1ADDR(0xbfff003c)
54 #define PCIMT_ERRADDR CKSEG1ADDR(
[all...]
/kernel/linux/linux-6.6/arch/mips/include/asm/
H A Dsni.h40 #define SNI_PORT_BASE CKSEG1ADDR(0xb4000000)
46 #define PCIMT_UCONF CKSEG1ADDR(0xbfff0004)
47 #define PCIMT_IOADTIMEOUT2 CKSEG1ADDR(0xbfff000c)
48 #define PCIMT_IOMEMCONF CKSEG1ADDR(0xbfff0014)
49 #define PCIMT_IOMMU CKSEG1ADDR(0xbfff001c)
50 #define PCIMT_IOADTIMEOUT1 CKSEG1ADDR(0xbfff0024)
51 #define PCIMT_DMAACCESS CKSEG1ADDR(0xbfff002c)
52 #define PCIMT_DMAHIT CKSEG1ADDR(0xbfff0034)
53 #define PCIMT_ERRSTATUS CKSEG1ADDR(0xbfff003c)
54 #define PCIMT_ERRADDR CKSEG1ADDR(
[all...]
/kernel/linux/linux-5.10/arch/mips/dec/prom/
H A Didentify.c74 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC); in prom_init_kn01()
82 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC); in prom_init_kn230()
91 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN02_RTC); in prom_init_kn02()
100 ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); in prom_init_kn02xa()
101 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); in prom_init_kn02xa()
110 ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); in prom_init_kn03()
111 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); in prom_init_kn03()
/kernel/linux/linux-6.6/arch/mips/dec/prom/
H A Didentify.c74 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC); in prom_init_kn01()
82 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC); in prom_init_kn230()
91 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN02_RTC); in prom_init_kn02()
100 ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); in prom_init_kn02xa()
101 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); in prom_init_kn02xa()
110 ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); in prom_init_kn03()
111 dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); in prom_init_kn03()
/kernel/linux/linux-5.10/arch/mips/boot/compressed/
H A Duart-16550.c13 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
18 #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
23 #define PORT(offset) (CKSEG1ADDR(INGENIC_UART0_BASE_ADDR) + (4 * offset))
28 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
34 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
/kernel/linux/linux-5.10/arch/mips/dec/
H A Decc-berr.c144 (void *)CKSEG1ADDR(address); in dec_ecc_be_backend()
227 volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); in dec_kn02_be_init()
229 kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); in dec_kn02_be_init()
230 kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); in dec_kn02_be_init()
245 volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); in dec_kn03_be_init()
246 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); in dec_kn03_be_init()
248 kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR); in dec_kn03_be_init()
249 kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN); in dec_kn03_be_init()
H A Dkn02xa-berr.c29 volatile u32 *mer = (void *)CKSEG1ADDR(KN02XA_MER); in dec_kn02xa_be_ack()
30 volatile u32 *mem_intr = (void *)CKSEG1ADDR(KN02XA_MEM_INTR); in dec_kn02xa_be_ack()
40 volatile u32 *kn02xa_mer = (void *)CKSEG1ADDR(KN02XA_MER); in dec_kn02xa_be_backend()
41 volatile u32 *kn02xa_ear = (void *)CKSEG1ADDR(KN02XA_EAR); in dec_kn02xa_be_backend()
126 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); in dec_kn02xa_be_init()
H A Dkn02-irq.c30 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in unmask_kn02_irq()
39 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in mask_kn02_irq()
62 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in init_kn02_irqs()
H A Dkn01-berr.c49 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); in dec_kn01_be_ack()
62 volatile u32 *kn01_erraddr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + in dec_kn01_be_backend()
150 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); in dec_kn01_be_interrupt()
177 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); in dec_kn01_be_init()
H A Dint-handler.S30 #define KN02_CSR_BASE CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)
31 #define KN02XA_IOASIC_BASE CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)
32 #define KN03_IOASIC_BASE CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)
/kernel/linux/linux-6.6/arch/mips/dec/
H A Decc-berr.c144 (void *)CKSEG1ADDR(address); in dec_ecc_be_backend()
227 volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); in dec_kn02_be_init()
229 kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR); in dec_kn02_be_init()
230 kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN); in dec_kn02_be_init()
245 volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); in dec_kn03_be_init()
246 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); in dec_kn03_be_init()
248 kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR); in dec_kn03_be_init()
249 kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN); in dec_kn03_be_init()
H A Dkn02xa-berr.c29 volatile u32 *mer = (void *)CKSEG1ADDR(KN02XA_MER); in dec_kn02xa_be_ack()
30 volatile u32 *mem_intr = (void *)CKSEG1ADDR(KN02XA_MEM_INTR); in dec_kn02xa_be_ack()
40 volatile u32 *kn02xa_mer = (void *)CKSEG1ADDR(KN02XA_MER); in dec_kn02xa_be_backend()
41 volatile u32 *kn02xa_ear = (void *)CKSEG1ADDR(KN02XA_EAR); in dec_kn02xa_be_backend()
126 volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR); in dec_kn02xa_be_init()
H A Dkn02-irq.c30 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in unmask_kn02_irq()
39 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in mask_kn02_irq()
62 volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + in init_kn02_irqs()
H A Dkn01-berr.c49 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); in dec_kn01_be_ack()
62 volatile u32 *kn01_erraddr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + in dec_kn01_be_backend()
150 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); in dec_kn01_be_interrupt()
177 volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR); in dec_kn01_be_init()
H A Dint-handler.S30 #define KN02_CSR_BASE CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)
31 #define KN02XA_IOASIC_BASE CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)
32 #define KN03_IOASIC_BASE CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)
/kernel/linux/linux-6.6/arch/mips/boot/compressed/
H A Duart-16550.c13 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
18 #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
23 #define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset))
/kernel/linux/linux-5.10/arch/mips/netlogic/common/
H A Dreset.S53 #define SYS_CPU_COHERENT_BASE CKSEG1ADDR(XLP_DEFAULT_IO_BASE) + \
167 li k1, CKSEG1ADDR(RESET_DATA_PHYS) /* NMI */
220 li t0, CKSEG1ADDR(RESET_DATA_PHYS)
246 li t0, CKSEG1ADDR(RESET_DATA_PHYS)
270 li t3, CKSEG1ADDR(RESET_DATA_PHYS)
/kernel/linux/linux-5.10/arch/mips/lib/
H A Duncached.c48 usp = CKSEG1ADDR(sp); in run_uncached()
60 ufunc = CKSEG1ADDR(lfunc); in run_uncached()
/kernel/linux/linux-6.6/arch/mips/lib/
H A Duncached.c48 usp = CKSEG1ADDR(sp); in run_uncached()
60 ufunc = CKSEG1ADDR(lfunc); in run_uncached()
/kernel/linux/linux-5.10/arch/mips/cobalt/
H A Dsetup.c84 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); in plat_mem_setup()
118 setup_8250_early_printk_port(CKSEG1ADDR(0x1c800000), 0, 0); in prom_init()
/kernel/linux/linux-6.6/arch/mips/cobalt/
H A Dsetup.c84 set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); in plat_mem_setup()
118 setup_8250_early_printk_port(CKSEG1ADDR(0x1c800000), 0, 0); in prom_init()
/kernel/linux/linux-5.10/arch/mips/sgi-ip22/
H A Dip22-gio.c277 ptr32 = (void *)CKSEG1ADDR(addr); in ip22_gio_id()
287 ptr8 = (void *)CKSEG1ADDR(addr + 3); in ip22_gio_id()
298 ptr16 = (void *)CKSEG1ADDR(addr + 2); in ip22_gio_id()
319 ptr = (void *)CKSEG1ADDR(addr + HQ2_MYSTERY_OFFS); in ip22_is_gr2()
/kernel/linux/linux-6.6/arch/mips/sgi-ip22/
H A Dip22-gio.c276 ptr32 = (void *)CKSEG1ADDR(addr); in ip22_gio_id()
286 ptr8 = (void *)CKSEG1ADDR(addr + 3); in ip22_gio_id()
297 ptr16 = (void *)CKSEG1ADDR(addr + 2); in ip22_gio_id()
318 ptr = (void *)CKSEG1ADDR(addr + HQ2_MYSTERY_OFFS); in ip22_is_gr2()
/kernel/linux/linux-5.10/drivers/mtd/devices/
H A Dms02-nv.c88 ms02nv_diagp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_DIAG)); in ms02nv_probe_one()
89 ms02nv_magicp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_MAGIC)); in ms02nv_probe_one()
277 csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); in ms02nv_init()
283 csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); in ms02nv_init()
/kernel/linux/linux-6.6/drivers/mtd/devices/
H A Dms02-nv.c88 ms02nv_diagp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_DIAG)); in ms02nv_probe_one()
89 ms02nv_magicp = (ms02nv_uint *)(CKSEG1ADDR(addr + MS02NV_MAGIC)); in ms02nv_probe_one()
277 csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR); in ms02nv_init()
283 csr = (volatile u32 *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR); in ms02nv_init()

Completed in 10 milliseconds

1234