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Searched refs:CCM_CCSR (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-vf610.c16 #define CCM_CCSR (ccm_base + 0x08) macro
208 clk[VF610_CLK_SLOW_CLK_SEL] = imx_clk_mux("slow_clk_sel", CCM_CCSR, 4, 1, slow_sels, ARRAY_SIZE(slow_sels)); in vf610_clocks_init()
209 clk[VF610_CLK_FASK_CLK_SEL] = imx_clk_mux("fast_clk_sel", CCM_CCSR, 5, 1, fast_sels, ARRAY_SIZE(fast_sels)); in vf610_clocks_init()
269 clk[VF610_CLK_PLL1_PFD_SEL] = imx_clk_mux("pll1_pfd_sel", CCM_CCSR, 16, 3, pll1_sels, 5); in vf610_clocks_init()
270 clk[VF610_CLK_PLL2_PFD_SEL] = imx_clk_mux("pll2_pfd_sel", CCM_CCSR, 19, 3, pll2_sels, 5); in vf610_clocks_init()
271 clk[VF610_CLK_SYS_SEL] = imx_clk_mux("sys_sel", CCM_CCSR, 0, 3, sys_sels, ARRAY_SIZE(sys_sels)); in vf610_clocks_init()
272 clk[VF610_CLK_DDR_SEL] = imx_clk_mux("ddr_sel", CCM_CCSR, 6, 1, ddr_sels, ARRAY_SIZE(ddr_sels)); in vf610_clocks_init()
441 clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus", CCM_CCSR, 24); in vf610_clocks_init()
H A Dclk-imx27.c32 #define CCM_CCSR (ccm + 0x28) macro
87 clk[IMX27_CLK_CLKO_SEL] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); in _mx27_clocks_init()
H A Dclk-imx6q.c253 #define CCM_CCSR 0x0c macro
274 reg = readl_relaxed(ccm_base + CCM_CCSR); in mmdc_ch1_disable()
276 writel_relaxed(reg, ccm_base + CCM_CCSR); in mmdc_ch1_disable()
284 reg = readl_relaxed(ccm_base + CCM_CCSR); in mmdc_ch1_reenable()
286 writel_relaxed(reg, ccm_base + CCM_CCSR); in mmdc_ch1_reenable()
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-vf610.c16 #define CCM_CCSR (ccm_base + 0x08) macro
208 clk[VF610_CLK_SLOW_CLK_SEL] = imx_clk_mux("slow_clk_sel", CCM_CCSR, 4, 1, slow_sels, ARRAY_SIZE(slow_sels)); in vf610_clocks_init()
209 clk[VF610_CLK_FASK_CLK_SEL] = imx_clk_mux("fast_clk_sel", CCM_CCSR, 5, 1, fast_sels, ARRAY_SIZE(fast_sels)); in vf610_clocks_init()
269 clk[VF610_CLK_PLL1_PFD_SEL] = imx_clk_mux("pll1_pfd_sel", CCM_CCSR, 16, 3, pll1_sels, 5); in vf610_clocks_init()
270 clk[VF610_CLK_PLL2_PFD_SEL] = imx_clk_mux("pll2_pfd_sel", CCM_CCSR, 19, 3, pll2_sels, 5); in vf610_clocks_init()
271 clk[VF610_CLK_SYS_SEL] = imx_clk_mux("sys_sel", CCM_CCSR, 0, 3, sys_sels, ARRAY_SIZE(sys_sels)); in vf610_clocks_init()
272 clk[VF610_CLK_DDR_SEL] = imx_clk_mux("ddr_sel", CCM_CCSR, 6, 1, ddr_sels, ARRAY_SIZE(ddr_sels)); in vf610_clocks_init()
441 clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus", CCM_CCSR, 24); in vf610_clocks_init()
H A Dclk-imx27.c31 #define CCM_CCSR (ccm + 0x28) macro
86 clk[IMX27_CLK_CLKO_SEL] = imx_clk_mux("clko_sel", CCM_CCSR, 0, 5, clko_sel_clks, ARRAY_SIZE(clko_sel_clks)); in _mx27_clocks_init()
H A Dclk-imx6q.c258 #define CCM_CCSR 0x0c macro
279 reg = readl_relaxed(ccm_base + CCM_CCSR); in mmdc_ch1_disable()
281 writel_relaxed(reg, ccm_base + CCM_CCSR); in mmdc_ch1_disable()
289 reg = readl_relaxed(ccm_base + CCM_CCSR); in mmdc_ch1_reenable()
291 writel_relaxed(reg, ccm_base + CCM_CCSR); in mmdc_ch1_reenable()

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