Home
last modified time | relevance | path

Searched refs:BYTE_REG_BITS_SET (Results 1 - 6 of 6) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/ethernet/via/
H A Dvia-velocity.c109 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_get_cam_mask()
121 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_get_cam_mask()
135 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_cam_mask()
146 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_cam_mask()
153 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_vlan_cam_mask()
164 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_vlan_cam_mask()
180 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_cam()
196 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_cam()
204 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_vlan_cam()
218 BYTE_REG_BITS_SET(CAMCR_PS_MA in mac_set_vlan_cam()
[all...]
H A Dvia-velocity.h47 #define BYTE_REG_BITS_SET(x,m,p) do { writeb( (readb((p)) & (~(m))) |(x),(p));} while (0) macro
1157 BYTE_REG_BITS_SET((n),0x07,&((regs)->DCFG));\
1161 BYTE_REG_BITS_SET((n),(MCFG_RFT0|MCFG_RFT1),&((regs)->MCFG));\
H A Dvia-rhine.c493 #define BYTE_REG_BITS_SET(x, m, p) do { iowrite8((ioread8((p)) & (~(m)))|(x), (p)); } while (0) macro
745 BYTE_REG_BITS_SET(rp->tx_thresh, 0x80, ioaddr + TxConfig); in rhine_kick_tx_threshold()
/kernel/linux/linux-6.6/drivers/net/ethernet/via/
H A Dvia-velocity.c109 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_get_cam_mask()
121 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_get_cam_mask()
135 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_cam_mask()
146 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_cam_mask()
153 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_vlan_cam_mask()
164 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_vlan_cam_mask()
180 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_cam()
196 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_cam()
204 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR); in mac_set_vlan_cam()
218 BYTE_REG_BITS_SET(CAMCR_PS_MA in mac_set_vlan_cam()
[all...]
H A Dvia-velocity.h46 #define BYTE_REG_BITS_SET(x,m,p) do { writeb( (readb((p)) & (~(m))) |(x),(p));} while (0) macro
1156 BYTE_REG_BITS_SET((n),0x07,&((regs)->DCFG));\
1160 BYTE_REG_BITS_SET((n),(MCFG_RFT0|MCFG_RFT1),&((regs)->MCFG));\
H A Dvia-rhine.c493 #define BYTE_REG_BITS_SET(x, m, p) do { iowrite8((ioread8((p)) & (~(m)))|(x), (p)); } while (0) macro
745 BYTE_REG_BITS_SET(rp->tx_thresh, 0x80, ioaddr + TxConfig); in rhine_kick_tx_threshold()

Completed in 19 milliseconds