Searched refs:ASS_CLK_GATE (Results 1 - 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| H A D | clk-s5pv210-audss.c | 29 #define ASS_CLK_GATE 0x8 macro
35 {ASS_CLK_GATE, 0},
142 reg_base + ASS_CLK_GATE, 6, 0, &lock); in s5pv210_audss_clk_probe()
148 reg_base + ASS_CLK_GATE, 5, 0, &lock); in s5pv210_audss_clk_probe()
151 reg_base + ASS_CLK_GATE, 4, 0, &lock); in s5pv210_audss_clk_probe()
154 reg_base + ASS_CLK_GATE, 3, 0, &lock); in s5pv210_audss_clk_probe()
157 reg_base + ASS_CLK_GATE, 2, 0, &lock); in s5pv210_audss_clk_probe()
160 reg_base + ASS_CLK_GATE, 1, 0, &lock); in s5pv210_audss_clk_probe()
163 reg_base + ASS_CLK_GATE, 0, 0, &lock); in s5pv210_audss_clk_probe()
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| H A D | clk-exynos-audss.c | 34 #define ASS_CLK_GATE 0x8 macro
39 { ASS_CLK_GATE, 0 },
216 reg_base + ASS_CLK_GATE, 0, 0, &lock); in exynos_audss_clk_probe()
220 reg_base + ASS_CLK_GATE, 2, 0, &lock); in exynos_audss_clk_probe()
224 reg_base + ASS_CLK_GATE, 3, 0, &lock); in exynos_audss_clk_probe()
228 reg_base + ASS_CLK_GATE, 4, 0, &lock); in exynos_audss_clk_probe()
235 reg_base + ASS_CLK_GATE, 5, 0, &lock); in exynos_audss_clk_probe()
240 reg_base + ASS_CLK_GATE, 9, 0, &lock); in exynos_audss_clk_probe()
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| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| H A D | clk-s5pv210-audss.c | 29 #define ASS_CLK_GATE 0x8 macro
35 {ASS_CLK_GATE, 0},
138 reg_base + ASS_CLK_GATE, 6, 0, &lock); in s5pv210_audss_clk_probe()
144 reg_base + ASS_CLK_GATE, 5, 0, &lock); in s5pv210_audss_clk_probe()
147 reg_base + ASS_CLK_GATE, 4, 0, &lock); in s5pv210_audss_clk_probe()
150 reg_base + ASS_CLK_GATE, 3, 0, &lock); in s5pv210_audss_clk_probe()
153 reg_base + ASS_CLK_GATE, 2, 0, &lock); in s5pv210_audss_clk_probe()
156 reg_base + ASS_CLK_GATE, 1, 0, &lock); in s5pv210_audss_clk_probe()
159 reg_base + ASS_CLK_GATE, 0, 0, &lock); in s5pv210_audss_clk_probe()
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| H A D | clk-exynos-audss.c | 33 #define ASS_CLK_GATE 0x8 macro
38 { ASS_CLK_GATE, 0 },
213 reg_base + ASS_CLK_GATE, 0, 0, &lock); in exynos_audss_clk_probe()
217 reg_base + ASS_CLK_GATE, 2, 0, &lock); in exynos_audss_clk_probe()
221 reg_base + ASS_CLK_GATE, 3, 0, &lock); in exynos_audss_clk_probe()
225 reg_base + ASS_CLK_GATE, 4, 0, &lock); in exynos_audss_clk_probe()
232 reg_base + ASS_CLK_GATE, 5, 0, &lock); in exynos_audss_clk_probe()
237 reg_base + ASS_CLK_GATE, 9, 0, &lock); in exynos_audss_clk_probe()
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