AR_WA (reference) in projects: kernel - OpenGrok search results

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Searched refs:AR_WA (Results 1 - 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
H A D	ar9002_hw.c	`254 val = REG_READ(ah, AR_WA); in ar9002_hw_configpcipowersave() 289 REG_WRITE(ah, AR_WA, val); in ar9002_hw_configpcipowersave() 317 REG_WRITE(ah, AR_WA, val); in ar9002_hw_configpcipowersave()`
H A D	ar9003_wow.c	`281 wa_reg = REG_READ(ah, AR_WA); in ath9k_hw_wow_set_arwr_reg() 286 REG_WRITE(ah, AR_WA, wa_reg); in ath9k_hw_wow_set_arwr_reg()`
H A D	hw.c	605 * Read back AR_WA into a permanent copy and set bits 14 and 17. in __ath9k_hw_init() 610 ah->WARegVal = REG_READ(ah, AR_WA); in __ath9k_hw_init() 622 REG_WRITE(ah, AR_WA, ah->WARegVal); in __ath9k_hw_init() 1365 REG_WRITE(ah, AR_WA, ah->WARegVal); in ath9k_hw_set_reset() 1449 REG_WRITE(ah, AR_WA, ah->WARegVal); in ath9k_hw_set_reset_power_on() 1487 REG_WRITE(ah, AR_WA, ah->WARegVal); in ath9k_hw_set_reset_reg() 2129 /* Clear Bit 14 of AR_WA after putting chip into Full Sleep mode. / in ath9k_set_power_sleep() 2131 REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); in ath9k_set_power_sleep() 2173 / Clear Bit 14 of AR_WA after putting chip into Net Sleep mode. */ in ath9k_set_power_network_sleep() 2175 REG_WRITE(ah, AR_WA, a in ath9k_set_power_network_sleep() [all...]
H A D	ar9003_hw.c	`1036 REG_WRITE(ah, AR_WA, ah->WARegVal); in ar9003_hw_configpcipowersave()`
H A D	reg.h	`702 #define AR_WA (AR_SREV_9340(ah) ? 0x40c4 : 0x4004) macro`
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath9k/
H A D	ar9002_hw.c	`254 val = REG_READ(ah, AR_WA(ah)); in ar9002_hw_configpcipowersave() 289 REG_WRITE(ah, AR_WA(ah), val); in ar9002_hw_configpcipowersave() 317 REG_WRITE(ah, AR_WA(ah), val); in ar9002_hw_configpcipowersave()`
H A D	ar9003_wow.c	`281 wa_reg = REG_READ(ah, AR_WA(ah)); in ath9k_hw_wow_set_arwr_reg() 286 REG_WRITE(ah, AR_WA(ah), wa_reg); in ath9k_hw_wow_set_arwr_reg()`
H A D	hw.c	604 * Read back AR_WA(ah) into a permanent copy and set bits 14 and 17. in __ath9k_hw_init() 609 ah->WARegVal = REG_READ(ah, AR_WA(ah)); in __ath9k_hw_init() 621 REG_WRITE(ah, AR_WA(ah), ah->WARegVal); in __ath9k_hw_init() 1364 REG_WRITE(ah, AR_WA(ah), ah->WARegVal); in ath9k_hw_set_reset() 1448 REG_WRITE(ah, AR_WA(ah), ah->WARegVal); in ath9k_hw_set_reset_power_on() 1486 REG_WRITE(ah, AR_WA(ah), ah->WARegVal); in ath9k_hw_set_reset_reg() 2128 /* Clear Bit 14 of AR_WA(ah) after putting chip into Full Sleep mode. / in ath9k_set_power_sleep() 2130 REG_WRITE(ah, AR_WA(ah), ah->WARegVal & ~AR_WA_D3_L1_DISABLE); in ath9k_set_power_sleep() 2172 / Clear Bit 14 of AR_WA(ah) after putting chip into Net Sleep mode. */ in ath9k_set_power_network_sleep() 2174 REG_WRITE(ah, AR_WA(a in ath9k_set_power_network_sleep() [all...]
H A D	ar9003_hw.c	`1036 REG_WRITE(ah, AR_WA(ah), ah->WARegVal); in ar9003_hw_configpcipowersave()`
H A D	reg.h	`702 #define AR_WA(_ah) (AR_SREV_9340(_ah) ? 0x40c4 : 0x4004) macro`

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