Searched refs:APBC_UART2 (Results 1 - 6 of 6) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/mmp/ |
| H A D | clk-of-pxa168.c | 42 #define APBC_UART2 0x70 macro
133 {0, "uart2_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART2, 4, 3, 0, &uart2_lock},
155 {PXA168_CLK_UART2, "uart2_clk", "uart2_mux", CLK_SET_RATE_PARENT, APBC_UART2, 0x3, 0x3, 0x0, 0, &uart2_lock},
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| H A D | clk-mmp2.c | 33 #define APBC_UART2 0x34 macro
270 apbc_base + APBC_UART2, 4, 3, 0, &clk_lock); in mmp2_clk_init()
275 apbc_base + APBC_UART2, 10, 0, &clk_lock); in mmp2_clk_init()
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| H A D | clk-pxa168.c | 39 #define APBC_UART2 0x70 macro
225 apbc_base + APBC_UART2, 4, 3, 0, &clk_lock); in pxa168_clk_init()
230 apbc_base + APBC_UART2, 10, 0, &clk_lock); in pxa168_clk_init()
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| H A D | clk-of-mmp2.c | 39 #define APBC_UART2 0x34 macro
242 {0, "uart2_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART2, 4, 3, 0, &uart2_lock},
268 {MMP2_CLK_UART2, "uart2_clk", "uart2_mux", CLK_SET_RATE_PARENT, APBC_UART2, 0x7, 0x3, 0x0, 0, &uart2_lock},
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| /kernel/linux/linux-6.6/drivers/clk/mmp/ |
| H A D | clk-of-pxa168.c | 37 #define APBC_UART2 0x70 macro
172 {0, "uart2_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART2, 4, 3, 0, &uart2_lock},
193 {PXA168_CLK_UART2, "uart2_clk", "uart2_mux", CLK_SET_RATE_PARENT, APBC_UART2, 0x3, 0x3, 0x0, 0, &uart2_lock},
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| H A D | clk-of-mmp2.c | 36 #define APBC_UART2 0x34 macro
241 {0, "uart2_mux", uart_parent_names, ARRAY_SIZE(uart_parent_names), CLK_SET_RATE_PARENT, APBC_UART2, 4, 3, 0, &uart2_lock},
267 {MMP2_CLK_UART2, "uart2_clk", "uart2_mux", CLK_SET_RATE_PARENT, APBC_UART2, 0x7, 0x3, 0x0, 0, &uart2_lock},
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