H A D | clk.h | 95 struct clk_hw *imx_clk_fracn_gppll(const char *name, const char *parent_name, void __iomem *base, 97 struct clk_hw *imx_clk_fracn_gppll_integer(const char *name, const char *parent_name, 104 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ 105 to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step)) 107 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ 109 to_clk(clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ 112 #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \ 113 to_clk(imx_clk_hw_pllv3(type, name, parent_name, base, div_mask)) 115 #define imx_clk_pfd(name, parent_name, reg, idx) \ 116 to_clk(imx_clk_hw_pfd(name, parent_nam 344 imx_clk_hw_fixed(const char *name, int rate) imx_clk_hw_fixed() argument 349 imx_clk_hw_fixed_factor(const char *name, const char *parent, unsigned int mult, unsigned int div) imx_clk_hw_fixed_factor() argument 356 imx_clk_hw_divider_closest(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) imx_clk_hw_divider_closest() argument 365 __imx_clk_hw_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, unsigned long flags) __imx_clk_hw_divider() argument 374 __imx_clk_hw_gate(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned long flags, unsigned long clk_gate_flags) __imx_clk_hw_gate() argument 383 __imx_clk_hw_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 cgr_val, unsigned long flags, unsigned int *share_count) __imx_clk_hw_gate2() argument 392 __imx_clk_hw_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents, unsigned long flags, unsigned long clk_mux_flags) __imx_clk_hw_mux() argument [all...] |