Searched refs:write_grf_reg (Results 1 - 4 of 4) sorted by relevance
| /device/soc/rockchip/common/vendor/drivers/phy/ |
| H A D | phy-rockchip-mipi-rx.c | 552 static inline void write_grf_reg(struct mipidphy_priv *priv, int index, u8 value)
in write_grf_reg() function
590 write_grf_reg(priv, GRF_DPHY_RX0_TESTCLK, 1);
in mipidphy0_wr_reg()
591 write_grf_reg(priv, GRF_DPHY_RX0_TESTDIN, test_code);
in mipidphy0_wr_reg()
592 write_grf_reg(priv, GRF_DPHY_RX0_TESTEN, 1);
in mipidphy0_wr_reg()
593 write_grf_reg(priv, GRF_DPHY_RX0_TESTCLK, 0);
in mipidphy0_wr_reg()
594 write_grf_reg(priv, GRF_DPHY_RX0_TESTEN, 0);
in mipidphy0_wr_reg()
595 write_grf_reg(priv, GRF_DPHY_RX0_TESTDIN, test_data);
in mipidphy0_wr_reg()
596 write_grf_reg(priv, GRF_DPHY_RX0_TESTCLK, 1);
in mipidphy0_wr_reg()
787 write_grf_reg(priv, GRF_DPHY_SEL, newval);
in rk1126_mipidphy_dphy_sel()
1043 write_grf_reg(pri in rk3368_mipidphy_individual_init()
[all...] |
| H A D | phy-rockchip-csi2-dphy-hw.c | 236 static inline void write_grf_reg(struct csi2_dphy_hw *hw, int index, u8 value)
in write_grf_reg() function
505 write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN, GENMASK(sensor->lanes - 1, 0));
in csi2_dphy_config_dual_mode()
506 write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1);
in csi2_dphy_config_dual_mode()
508 write_grf_reg(hw, GRF_DPHY_CSI2PHY_LANE_SEL, val);
in csi2_dphy_config_dual_mode()
513 write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN, GENMASK(sensor->lanes - 1, 0));
in csi2_dphy_config_dual_mode()
514 write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1);
in csi2_dphy_config_dual_mode()
516 write_grf_reg(hw, GRF_DPHY_CSI2PHY1_LANE_SEL, val);
in csi2_dphy_config_dual_mode()
526 write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN0, GENMASK(sensor->lanes - 1, 0));
in csi2_dphy_config_dual_mode()
527 write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1);
in csi2_dphy_config_dual_mode()
529 write_grf_reg(h in csi2_dphy_config_dual_mode()
[all...] |
| /device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
| H A D | phy-rockchip-mipi-rx.c | 574 static inline void write_grf_reg(struct mipidphy_priv *priv, in write_grf_reg() function
613 write_grf_reg(priv, GRF_DPHY_RX0_TESTCLK, 1); in mipidphy0_wr_reg()
614 write_grf_reg(priv, GRF_DPHY_RX0_TESTDIN, test_code); in mipidphy0_wr_reg()
615 write_grf_reg(priv, GRF_DPHY_RX0_TESTEN, 1); in mipidphy0_wr_reg()
616 write_grf_reg(priv, GRF_DPHY_RX0_TESTCLK, 0); in mipidphy0_wr_reg()
617 write_grf_reg(priv, GRF_DPHY_RX0_TESTEN, 0); in mipidphy0_wr_reg()
618 write_grf_reg(priv, GRF_DPHY_RX0_TESTDIN, test_data); in mipidphy0_wr_reg()
619 write_grf_reg(priv, GRF_DPHY_RX0_TESTCLK, 1); in mipidphy0_wr_reg()
805 write_grf_reg(priv, GRF_DPHY_SEL, newval); in rk1126_mipidphy_dphy_sel()
1069 write_grf_reg(pri in rk3368_mipidphy_individual_init()
[all...] |
| H A D | phy-rockchip-csi2-dphy-hw.c | 234 static inline void write_grf_reg(struct csi2_dphy_hw *hw, in write_grf_reg() function
517 write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN, in csi2_dphy_config_dual_mode()
519 write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1); in csi2_dphy_config_dual_mode()
521 write_grf_reg(hw, GRF_DPHY_CSI2PHY_LANE_SEL, val); in csi2_dphy_config_dual_mode()
525 write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN, in csi2_dphy_config_dual_mode()
527 write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1); in csi2_dphy_config_dual_mode()
529 write_grf_reg(hw, GRF_DPHY_CSI2PHY1_LANE_SEL, val); in csi2_dphy_config_dual_mode()
538 write_grf_reg(hw, GRF_DPHY_CSI2PHY_DATALANE_EN0, in csi2_dphy_config_dual_mode()
540 write_grf_reg(hw, GRF_DPHY_CSI2PHY_CLKLANE_EN, 0x1); in csi2_dphy_config_dual_mode()
542 write_grf_reg(h in csi2_dphy_config_dual_mode()
[all...] |
Completed in 8 milliseconds