Searched refs:write_csi2_dphy_reg (Results 1 - 2 of 2) sorted by relevance
| /device/soc/rockchip/common/vendor/drivers/phy/ |
| H A D | phy-rockchip-csi2-dphy-hw.c | 259 static inline void write_csi2_dphy_reg(struct csi2_dphy_hw *hw, int index, u32 value)
in write_csi2_dphy_reg() function
320 write_csi2_dphy_reg(hw, offset, val);
in csi_mipidphy_wr_ths_settle()
607 write_csi2_dphy_reg(hw, CSI2PHY_CLK1_LANE_ENABLE, BIT(0x06));
in csi2_dphy_hw_stream_on()
611 write_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, val);
in csi2_dphy_hw_stream_on()
616 write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x1e);
in csi2_dphy_hw_stream_on()
617 write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x1f);
in csi2_dphy_hw_stream_on()
621 write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x5e);
in csi2_dphy_hw_stream_on()
622 write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x5f);
in csi2_dphy_hw_stream_on()
634 write_csi2_dphy_reg(hw, CSI2PHY_CLK_CALIB_ENABLE, 0x80);
in csi2_dphy_hw_stream_on()
636 write_csi2_dphy_reg(h in csi2_dphy_hw_stream_on()
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| /device/soc/rockchip/rk3588/kernel/drivers/phy/rockchip/ |
| H A D | phy-rockchip-csi2-dphy-hw.c | 257 static inline void write_csi2_dphy_reg(struct csi2_dphy_hw *hw, in write_csi2_dphy_reg() function
325 write_csi2_dphy_reg(hw, offset, val); in csi_mipidphy_wr_ths_settle()
627 write_csi2_dphy_reg(hw, CSI2PHY_CLK1_LANE_ENABLE, BIT(6)); in csi2_dphy_hw_stream_on()
631 write_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, val); in csi2_dphy_hw_stream_on()
636 write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x1e); in csi2_dphy_hw_stream_on()
637 write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x1f); in csi2_dphy_hw_stream_on()
641 write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x5e); in csi2_dphy_hw_stream_on()
642 write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x5f); in csi2_dphy_hw_stream_on()
654 write_csi2_dphy_reg(hw, CSI2PHY_CLK_CALIB_ENABLE, 0x80); in csi2_dphy_hw_stream_on()
656 write_csi2_dphy_reg(h in csi2_dphy_hw_stream_on()
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