mux_pll_src_cpll_gpll_npll_ppll_p (reference) in projects: device - OpenGrok search results

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Searched refs:mux_pll_src_cpll_gpll_npll_ppll_p (Results 1 - 1 of 1) sorted by relevance

/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A D	clk-rk3399.c	119 PNAME(mux_pll_src_cpll_gpll_npll_ppll_p) = {"dummy_cpll", "gpll", "npll", "ppll"}; variable 153 PNAME(mux_pll_src_cpll_gpll_npll_ppll_p) = {"cpll", "gpll", "npll", "ppll"}; variable 592 COMPOSITE(0, "aclk_vcodec_pre", mux_pll_src_cpll_gpll_npll_ppll_p, 0, RK3399_CLKSEL_CON(7), 6, 2, MFLAGS, 0, 5, 608 COMPOSITE(0, "aclk_vdu_pre", mux_pll_src_cpll_gpll_npll_ppll_p, 0, RK3399_CLKSEL_CON(8), 6, 2, MFLAGS, 0, 5, DFLAGS, 619 COMPOSITE(0, "aclk_iep_pre", mux_pll_src_cpll_gpll_npll_ppll_p, 0, RK3399_CLKSEL_CON(10), 6, 2, MFLAGS, 0, 5, 630 COMPOSITE(SCLK_RGA_CORE, "clk_rga_core", mux_pll_src_cpll_gpll_npll_ppll_p, 0, RK3399_CLKSEL_CON(12), 6, 2, MFLAGS, 633 COMPOSITE(0, "aclk_rga_pre", mux_pll_src_cpll_gpll_npll_ppll_p, 0, RK3399_CLKSEL_CON(11), 6, 2, MFLAGS, 0, 5,

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