Searched refs:mux_i2s2_p (Results 1 - 5 of 5) sorted by relevance
| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk-rk3328.c | 156 PNAME(mux_i2s2_p) = {"clk_i2s2_div", "clk_i2s2_frac", "clkin_i2s2", "xin12m"}; variable
196 MUX(0, "i2s2_pre", mux_i2s2_p, CLK_SET_RATE_PARENT, RK3328_CLKSEL_CON(10), 8, 2, MFLAGS);
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| H A D | clk-rv1108.c | 130 PNAME(mux_i2s2_p) = {"i2s2_src", "i2s2_frac", "dummy", "xin12m"}; variable
173 MUX(0, "i2s2_pre", mux_i2s2_p, CLK_SET_RATE_PARENT, RV1108_CLKSEL_CON(7), 12, 2, MFLAGS);
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| H A D | clk-rk3228.c | 150 PNAME(mux_i2s2_p) = {"i2s2_src", "i2s2_frac", "xin12m"}; variable
181 MUX(0, "i2s2_pre", mux_i2s2_p, CLK_SET_RATE_PARENT, RK2928_CLKSEL_CON(16), 8, 2, MFLAGS);
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| H A D | clk-px30.c | 122 PNAME(mux_i2s2_p) = {"clk_i2s2_src", "clk_i2s2_frac", "i2s2_clkin", "xin12m"}; variable
185 MUX(0, "clk_i2s2_mux", mux_i2s2_p, CLK_SET_RATE_PARENT, PX30_CLKSEL_CON(32), 10, 2, MFLAGS);
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| H A D | clk-rk3399.c | 194 PNAME(mux_i2s2_p) = {"clk_i2s2_div", "clk_i2s2_frac", "clkin_i2s", "xin12m"}; variable
254 MUX(0, "clk_i2s2_mux", mux_i2s2_p, CLK_SET_RATE_PARENT, RK3399_CLKSEL_CON(30), 8, 2, MFLAGS);
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