| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk-rk3036.c | 27 dpll, enumerator
124 PNAME(mux_pll_src_3plls_p) = {"apll", "dpll", "gpll"};
127 PNAME(mux_pll_src_apll_dpll_gpll_usb480m_p) = {"apll", "dpll", "gpll", "usb480m"};
128 PNAME(mux_pll_src_dmyapll_dpll_gpll_xin24_p) = {"dummy_apll", "dpll", "gpll", "xin24m"};
130 PNAME(mux_mmc_src_p) = {"apll", "dpll", "gpll", "xin24m"};
143 [dpll] = PLL(pll_rk3036, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(4), RK2928_MODE_CON, 4, 4, 0, NULL),
180 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
191 GATE(0, "dpll_cpu", "dpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(10), 8, GFLAGS),
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| H A D | clk-rk3188.c | 27 dpll, enumerator
194 PNAME(mux_ddrphy_p) = {"dpll", "gpll_ddr"};
206 PNAME(mux_mac_p) = {"gpll", "dpll"};
212 [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(4), RK2928_MODE_CON, 4, 4, 0, NULL),
222 [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(4), RK2928_MODE_CON, 4, 5, 0, NULL),
|
| H A D | clk-rk3128.c | 25 dpll, enumerator
155 [dpll] = PLL(pll_rk3036, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(4), RK2928_MODE_CON, 4, 0, 0, NULL),
195 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
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| H A D | clk-rk3368.c | 25 dpll, enumerator
149 [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK3368_PLL_CON(8), RK3368_PLL_CON(11), 8, 2, 0, NULL),
303 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK3368_CLKGATE_CON(1), 8, GFLAGS),
|
| H A D | clk-rk3328.c | 27 dpll, enumerator
149 PNAME(mux_ddrphy_p) = {"dpll", "apll", "cpll"};
176 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p, 0, RK3328_PLL_CON(8), RK3328_MODE_CON, 4, 3, 0, NULL),
230 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(0), 1, GFLAGS),
|
| H A D | clk-rv1108.c | 24 dpll, enumerator
116 PNAME(mux_pll_src_4plls_p) = {"dpll", "gpll", "hdmiphy", "usb480m"};
117 PNAME(mux_pll_src_2plls_p) = {"dpll", "gpll"};
121 PNAME(mux_mmc_src_p) = {"dpll", "gpll", "xin24m", "usb480m"};
122 PNAME(mux_pll_src_dpll_gpll_usb480m_p) = {"dpll", "gpll", "usb480m"};
138 PNAME(mux_dsp_src_p) = {"dpll", "gpll", "apll", "usb480m"};
141 PNAME(mux_hdmi_cec_src_p) = {"dpll", "gpll", "xin24m"};
147 [dpll] = PLL(pll_rk3399, PLL_DPLL, "dpll", mux_pll_p, 0, RV1108_PLL_CON(8), RV1108_PLL_CON(11), 8, 1, 0, NULL),
183 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSE
[all...] |
| H A D | clk-rk3228.c | 26 dpll, enumerator
164 [dpll] = PLL(pll_rk3036, PLL_DPLL, "dpll", mux_pll_p, 0, RK2928_PLL_CON(3), RK2928_MODE_CON, 4, 6, 0, NULL),
204 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 2, GFLAGS),
214 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(0), 6, GFLAGS),
|
| H A D | clk-rk3308.c | 28 dpll, enumerator
101 PNAME(mux_dpll_vpll0_p) = {"dpll", "vpll0"};
102 PNAME(mux_dpll_vpll0_xin24m_p) = {"dpll", "vpll0", "xin24m"};
103 PNAME(mux_dpll_vpll0_vpll1_p) = {"dpll", "vpll0", "vpll1"};
104 PNAME(mux_dpll_vpll0_vpll1_xin24m_p) = {"dpll", "vpll0", "vpll1", "xin24m"};
105 PNAME(mux_dpll_vpll0_vpll1_usb480m_xin24m_p) = {"dpll", "vpll0", "vpll1", "usb480m", "xin24m"};
154 PNAME(mux_uart_src_p) = {"xin24m", "usb480m", "dpll", "vpll0", "vpll1"};
160 [dpll] =
161 PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p, 0, RK3308_PLL_CON(8), RK3308_MODE_CON, 2, 1, 0, rk3308_pll_rates),
460 GATE(0, "clk_wifi_dpll", "dpll",
[all...] |
| H A D | clk-rk3288.c | 31 dpll, enumerator
177 [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK3288_PLL_CON(4), RK3288_MODE_CON, 4, 5, 0, NULL),
252 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK3288_CLKGATE_CON(0), 8, GFLAGS),
|
| H A D | clk-px30.c | 22 dpll, enumerator
157 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p, 0, PX30_PLL_CON(8), PX30_MODE_CON, 4, 1, 0, NULL),
255 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, PX30_CLKGATE_CON(0), 7, GFLAGS),
|
| H A D | clk-rk3399.c | 27 dpll, enumerator
218 [dpll] = PLL(pll_rk3399, PLL_DPLL, "dpll", mux_pll_p, 0, RK3399_PLL_CON(16), RK3399_PLL_CON(19), 8, 31, 0, NULL),
419 GATE(0, "clk_core_l_dpll_src", "dpll", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(0), 2, GFLAGS),
443 GATE(0, "clk_core_b_dpll_src", "dpll", CLK_IGNORE_UNUSED, RK3399_CLKGATE_CON(1), 2, GFLAGS),
1102 GATE(0, "clk_ddrc_dpll_src", "dpll", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(3), 2, GFLAGS),
|
| /device/soc/rockchip/common/vendor/drivers/clk/ |
| H A D | clk-rk1808.c | 25 dpll, enumerator
179 [dpll] = PLL(pll_rk3036, PLL_DPLL, "dpll", mux_pll_p, 0, RK1808_PLL_CON(8), RK1808_MODE_CON, 2, 1, 0, NULL),
340 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED, RK1808_CLKGATE_CON(8), 5, GFLAGS),
|
| /device/soc/rockchip/rk3566/vendor/drivers/clk/ |
| H A D | clk-rk3568.c | 33 dpll, enumerator
230 PNAME(dpll_gpll_cpll_p) = {"dpll", "gpll", "cpll"};
231 PNAME(clk_ddr1x_p) = {"clk_ddrphy1x_src", "dpll"};
308 [dpll] = PLL(pll_rk3328, PLL_DPLL, "dpll", mux_pll_p, 0, RK3568_PLL_CON(8), RK3568_MODE_CON0, 2, 1, 0, NULL),
|