Home
last modified time | relevance | path

Searched refs:a0 (Results 1 - 16 of 16) sorted by relevance

/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/musl/arch/riscv32/
H A Dsyscall_arch.h8 : "+r"(a0) : __VA_ARGS__ : "memory"); \
9 return a0; \
14 register long a0 __asm__("a0"); in __syscall0()
21 register long a0 __asm__("a0") = a; in __syscall1()
22 __asm_syscall("r"(a7), "0"(a0)) in __syscall1()
28 register long a0 __asm__("a0") = a; in __syscall2()
30 __asm_syscall("r"(a7), "0"(a0), " in __syscall2()
[all...]
/device/soc/rockchip/common/vendor/drivers/firmware/
H A Drockchip_sip.c69 return res.a0; in sip_smc_set_suspend_mode()
87 return res.a0; in sip_smc_virtual_poweroff()
97 return res.a0; in sip_smc_remotectl_config()
106 if (res.a0) { in sip_smc_secure_reg_read()
107 pr_err("%s error: %d, addr phy: 0x%x\n", __func__, (int)res.a0, addr_phy); in sip_smc_secure_reg_read()
119 if (res.a0) { in sip_smc_secure_reg_write()
120 pr_err("%s error: %d, addr phy: 0x%x\n", __func__, (int)res.a0, addr_phy); in sip_smc_secure_reg_write()
123 return res.a0; in sip_smc_secure_reg_write()
172 if (IS_SIP_ERROR(res.a0)) { in sip_smc_request_share_mem()
219 if (res.a0 ! in sip_smc_get_dram_map()
[all...]
/device/soc/rockchip/rk3588/kernel/drivers/firmware/
H A Drockchip_sip.c71 return res.a0; in sip_smc_set_suspend_mode()
89 return res.a0; in sip_smc_virtual_poweroff()
99 return res.a0; in sip_smc_remotectl_config()
108 if (res.a0) in sip_smc_secure_reg_read()
110 __func__, (int)res.a0, addr_phy); in sip_smc_secure_reg_read()
121 if (res.a0) in sip_smc_secure_reg_write()
123 __func__, (int)res.a0, addr_phy); in sip_smc_secure_reg_write()
125 return res.a0; in sip_smc_secure_reg_write()
174 if (IS_SIP_ERROR(res.a0)) in sip_smc_request_share_mem()
220 if (res.a0 ! in sip_smc_get_dram_map()
[all...]
/device/soc/rockchip/common/vendor/drivers/devfreq/
H A Drockchip_dmc_dbg.c193 if (res.a0) { in dmcinfo_proc_show()
194 seq_printf(m, "rockchip_sip_config_dram_debug error:%lx\n", res.a0); in dmcinfo_proc_show()
294 if (res.a0) { in powersave_proc_show()
295 seq_printf(m, "rockchip_sip_config_dram_debug error:%lx\n", res.a0); in powersave_proc_show()
357 if (res.a0) { in powersave_proc_write()
358 pr_err("rockchip_sip_config_dram_debug error:%lx\n", res.a0); in powersave_proc_write()
409 if (res.a0) { in powersave_proc_write()
410 pr_err("rockchip_sip_config_dram_debug error:%lx\n", res.a0); in powersave_proc_write()
446 if (res.a0) { in drvodt_proc_show()
447 seq_printf(m, "rockchip_sip_config_dram_debug error:%lx\n", res.a0); in drvodt_proc_show()
[all...]
H A Drockchip_dmc.c352 return res.a0; in rockchip_ddr_set_rate()
979 return res.a0; in rockchip_ddr_set_auto_self_refresh()
1009 if (res.a0) { in wait_dcf_complete_irq()
1010 pr_err("%s: dram post set rate error:%lx\n", __func__, res.a0); in wait_dcf_complete_irq()
1040 if (res.a0) { in rockchip_dmcfreq_wait_complete()
1041 pr_err("rockchip_sip_config_mcu_start error:%lx\n", res.a0); in rockchip_dmcfreq_wait_complete()
1063 if (res.a0) { in rockchip_get_freq_info()
1064 dev_err(dmcfreq->dev, "rockchip_sip_config_dram_get_freq_info error:%lx\n", res.a0); in rockchip_get_freq_info()
1144 if (res.a0 || res.a1 < 0x103) { in px30_dmc_init()
1157 if (res.a0 ! in px30_dmc_init()
[all...]
H A Drockchip_bus.c65 return res.a0; in rockchip_sip_bus_smc_config()
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-ddr.c69 if (res.a0) { in rockchip_ddrclk_sip_set_rate()
82 return res.a0; in rockchip_ddrclk_sip_recalc_rate()
91 return res.a0; in rockchip_ddrclk_sip_round_rate()
178 return res.a0; in rockchip_ddrclk_sip_set_rate_v2()
186 if (!res.a0) { in rockchip_ddrclk_sip_recalc_rate_v2()
204 if (!res.a0) { in rockchip_ddrclk_sip_round_rate_v2()
/device/soc/rockchip/rk3588/kernel/drivers/devfreq/
H A Drockchip_dmc.c345 return res.a0; in rockchip_ddr_set_rate()
1071 return res.a0; in rockchip_ddr_set_auto_self_refresh()
1102 if (res.a0) in wait_dcf_complete_irq()
1103 pr_err("%s: dram post set rate error:%lx\n", __func__, res.a0); in wait_dcf_complete_irq()
1132 if (res.a0) { in rockchip_dmcfreq_wait_complete()
1133 pr_err("rockchip_sip_config_mcu_start error:%lx\n", res.a0); in rockchip_dmcfreq_wait_complete()
1157 if (res.a0) { in rockchip_get_freq_info()
1159 res.a0); in rockchip_get_freq_info()
1239 if (res.a0 || res.a1 < 0x103) { in px30_dmc_init()
1254 if (res.a0 ! in px30_dmc_init()
[all...]
H A Drockchip_bus.c67 return res.a0; in rockchip_sip_bus_smc_config()
/device/qemu/riscv32_virt/liteos_m/board/
H A Dlos_start.S31 SREG a0, 27 * REGBYTES(sp)
/device/board/hisilicon/hispark_taurus/liteos_a/board/
H A Dboard.c70 "mov r0, %[a0]\n" in raw_smc_send()
72 : [a0] "+r"(smc_id) in raw_smc_send()
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/startup/
H A Driscv_init_loaderboot.S151 LREG a0, 32 * REGBYTES(sp)
153 csrw mstatus, a0
232 csrr a0, mscratch
/device/soc/hisilicon/hi3861v100/sdk_liteos/include/
H A Dhi_crash.h131 hi_u32 a0; member
/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/hcc/
H A Dhcc_host.h304 hi_u32 a0; member
H A Dhcc_host.c1452 oam_error_log1(0, 0, "a0 = 0x%x", info->reg_info.a0);
/device/soc/hisilicon/hi3861v100/sdk_liteos/app/wifiiot_app/src/
H A Dblackbox_adapter_impl.c153 sysErrInfo->reg_info.s1, sysErrInfo->reg_info.a0, in SaveRegInfo()

Completed in 21 milliseconds