U_PHY_SYNC_SOF0_LINK (reference) in projects: device

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/device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/mipi_rx/
H A D	mipi_rx_reg.h	`174 /* Define the union U_PHY_SYNC_SOF0_LINK / 184 } U_PHY_SYNC_SOF0_LINK; typedef 2232 volatile U_PHY_SYNC_SOF0_LINK PHY_SYNC_SOF0_LINK; / 0x30 */`
H A D	mipi_rx_hal.c	`1682 U_PHY_SYNC_SOF0_LINK phy_sync_sof0_link; in mipi_rx_drv_set_lvds_phy_sync_code()`
/device/soc/hisilicon/common/platform/mipi_csi/
H A D	mipi_rx_reg.h	`171 /* Define the union U_PHY_SYNC_SOF0_LINK / 181 } U_PHY_SYNC_SOF0_LINK; typedef 2229 volatile U_PHY_SYNC_SOF0_LINK PHY_SYNC_SOF0_LINK; / 0x30 */`
H A D	mipi_rx_hi2121.c	`1675 U_PHY_SYNC_SOF0_LINK phySyncSof0Link; in MipiRxDrvSetLvdsPhySyncCode()`