Searched refs:SCLK_UART4 (Results 1 - 16 of 16) sorted by relevance
| /device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/ |
| H A D | rk1808-cru.h | 65 #define SCLK_UART4 64 macro
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| H A D | px30-cru.h | 29 #define SCLK_UART4 27 macro
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| H A D | rk3288-cru.h | 36 #define SCLK_UART4 81 macro
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| H A D | rk3368-cru.h | 34 #define SCLK_UART4 81 macro
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| H A D | rk3568-cru.h | 362 #define SCLK_UART4 299 macro
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| /device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/ |
| H A D | rk1808-cru.h | 65 #define SCLK_UART4 64 macro
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| H A D | rv1126-cru.h | 95 #define SCLK_UART4 28 macro
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| H A D | rk3568-cru.h | 362 #define SCLK_UART4 299 macro
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| H A D | rk3588-cru.h | 198 #define SCLK_UART4 195 macro
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| /device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
| H A D | clk-rk3368.c | 266 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT, RK3368_CLKSEL_CON(41), 8, 2, MFLAGS);
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| H A D | clk-rk3308.c | 306 GATE(SCLK_UART4, "clk_uart4", "clk_uart4_mux", 0, RK3308_CLKGATE_CON(2), 12, GFLAGS),
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| H A D | clk-rk3288.c | 220 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT, RK3288_CLKSEL_CON(3), 8, 2, MFLAGS);
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| H A D | clk-px30.c | 504 GATE(SCLK_UART4, "clk_uart4", "clk_uart4_mux", CLK_SET_RATE_PARENT, PX30_CLKGATE_CON(11), 11, GFLAGS),
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| /device/soc/rockchip/common/vendor/drivers/clk/ |
| H A D | clk-rk1808.c | 624 GATE(SCLK_UART4, "clk_uart4", "clk_uart4_mux", 0, RK1808_CLKGATE_CON(12), 7, GFLAGS),
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| /device/soc/rockchip/rk3566/vendor/drivers/clk/ |
| H A D | clk-rk3568.c | 915 GATE(SCLK_UART4, "sclk_uart4", "sclk_uart4_mux", 0, RK3568_CLKGATE_CON(28), 11, GFLAGS),
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| /device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/ |
| H A D | clk-rk3588.c | 1239 GATE(SCLK_UART4, "sclk_uart4", "clk_uart4", 0,
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Completed in 38 milliseconds