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Searched refs:PRFCNT_BASE_HI (Results 1 - 11 of 11) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_instr_backend.c85 kbase_reg_write(kbdev, GPU_CONTROL_MCU_REG(PRFCNT_BASE_HI), enable->dump_buffer >> 0x20); in kbase_instr_hwcnt_enable_internal()
99 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), enable->dump_buffer >> BASE_MEM_FLAGS_NR_HI_BITS); in kbase_instr_hwcnt_enable_internal()
223 kbase_reg_write(kbdev, GPU_CONTROL_MCU_REG(PRFCNT_BASE_HI), kbdev->hwcnt.addr >> BASE_MEM_FLAGS_NR_HI_BITS); in kbase_instr_hwcnt_request_dump()
227 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), kbdev->hwcnt.addr >> BASE_MEM_FLAGS_NR_HI_BITS); in kbase_instr_hwcnt_request_dump()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/backend/
H A Dmali_kbase_gpu_regmap_csf.h90 #define PRFCNT_BASE_HI \ macro
H A Dmali_kbase_gpu_regmap_jm.h73 #define PRFCNT_BASE_HI \ macro
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_instr_backend.c149 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), in kbase_instr_hwcnt_enable_internal()
289 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), in kbase_instr_hwcnt_request_dump()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_instr_backend.c134 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), setup->dump_buffer >> 0x20, kctx); in kbase_instr_hwcnt_enable_internal()
264 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), kbdev->hwcnt.addr >> 0x20, NULL); in kbase_instr_hwcnt_request_dump()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_instr_backend.c89 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), in kbase_instr_hwcnt_enable_internal()
239 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), in kbase_instr_hwcnt_request_dump()
H A Dmali_kbase_model_dummy.c1355 case PRFCNT_BASE_HI:
/device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/backend/
H A Dmali_kbase_gpu_regmap_jm.h70 #define PRFCNT_BASE_HI 0x064 /* (RW) Performance counter memory macro
H A Dmali_kbase_gpu_regmap_csf.h131 #define PRFCNT_BASE_HI 0x064 /* (RW) Performance counter memory macro
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h73 #define PRFCNT_BASE_HI 0x064 /* (RW) Performance counter memory region base address, high word */ macro
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h75 #define PRFCNT_BASE_HI 0x064 /* (RW) Performance counter memory region base address, high word */ macro

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