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Searched refs:PCLK_GPIO0_PMU (Results 1 - 8 of 8) sorted by relevance

/device/soc/rockchip/common/sdk_linux/include/dt-bindings/clock/
H A Drk1808-cru.h213 #define PCLK_GPIO0_PMU 292 macro
H A Dpx30-cru.h197 #define PCLK_GPIO0_PMU 20 macro
H A Drk3399-cru.h370 #define PCLK_GPIO0_PMU 23 macro
/device/soc/rockchip/rk3588/kernel/include/dt-bindings/clock/
H A Drk1808-cru.h213 #define PCLK_GPIO0_PMU 292 macro
/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rv1108.c228 GATE(PCLK_GPIO0_PMU, "pclk_gpio0_pmu", "pmu_24m_ena", 0, RV1108_CLKGATE_CON(10), 2, GFLAGS),
H A Dclk-px30.c731 GATE(PCLK_GPIO0_PMU, "pclk_gpio0_pmu", "pclk_pmu_pre", 0, PX30_PMU_CLKGATE_CON(0), 6, GFLAGS),
H A Dclk-rk3399.c1160 GATE(PCLK_GPIO0_PMU, "pclk_gpio0_pmu", "pclk_pmu_src", 0, RK3399_PMU_CLKGATE_CON(1), 3, GFLAGS),
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c816 GATE(PCLK_GPIO0_PMU, "pclk_gpio0_pmu", "pclk_pmu_pre", 0, RK1808_PMU_CLKGATE_CON(0), 6, GFLAGS),

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