Searched refs:MMU_IRQ_RAWSTAT (Results 1 - 14 of 14) sorted by relevance
| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/ |
| H A D | mali_kbase_gpu_regmap.h | 179 #define MMU_IRQ_RAWSTAT 0x000 /* (RW) Raw interrupt status register */ macro
236 * MMU_IRQ_RAWSTAT register values. Values are valid also for
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_irq_linux.c | 346 rawstat_offset = MMU_REG(MMU_IRQ_RAWSTAT); in kbasep_common_test_interrupt()
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| H A D | mali_kbase_jm_hw.c | 948 dev_err(kbdev->dev, " MMU_IRQ_RAWSTAT=0x%08x GPU_FAULTSTATUS=0x%08x", in kbase_debug_dump_registers()
949 kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_RAWSTAT)), kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS))); in kbase_debug_dump_registers()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
| H A D | mali_midg_regmap.h | 255 #define MMU_IRQ_RAWSTAT 0x000 /* (RW) Raw interrupt status register */ macro
303 * MMU_IRQ_RAWSTAT register values. Values are valid also for
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_irq_linux.c | 306 rawstat_offset = MMU_REG(MMU_IRQ_RAWSTAT); in kbasep_common_test_interrupt()
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| H A D | mali_kbase_jm_hw.c | 1021 dev_err(kbdev->dev, " MMU_IRQ_RAWSTAT=0x%08x GPU_FAULTSTATUS=0x%08x", in kbase_debug_dump_registers()
1022 kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_RAWSTAT), NULL), in kbase_debug_dump_registers()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
| H A D | mali_midg_regmap.h | 258 #define MMU_IRQ_RAWSTAT 0x000 /* (RW) Raw interrupt status register */ macro
307 * MMU_IRQ_RAWSTAT register values. Values are valid also for
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_irq_linux.c | 348 rawstat_offset = MMU_REG(MMU_IRQ_RAWSTAT); in kbasep_common_test_interrupt()
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| H A D | mali_kbase_jm_hw.c | 1067 dev_err(kbdev->dev, " MMU_IRQ_RAWSTAT=0x%08x GPU_FAULTSTATUS=0x%08x", in kbase_debug_dump_registers()
1068 kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_RAWSTAT)), in kbase_debug_dump_registers()
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| H A D | mali_kbase_model_dummy.c | 51 * MMU_IRQ_RAWSTAT
1782 } else if (addr == MMU_REG(MMU_IRQ_RAWSTAT)) {
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/csf/ |
| H A D | mali_kbase_csf_reset_gpu.c | 243 dev_err(kbdev->dev, " JOB_IRQ_RAWSTAT=0x%08x MMU_IRQ_RAWSTAT=0x%08x GPU_FAULTSTATUS=0x%08x", in kbase_csf_debug_dump_registers()
245 kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_RAWSTAT)), in kbase_csf_debug_dump_registers()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_irq_linux.c | 315 rawstat_offset = MMU_REG(MMU_IRQ_RAWSTAT); in kbasep_common_test_interrupt()
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| H A D | mali_kbase_jm_hw.c | 1137 dev_err(kbdev->dev, " MMU_IRQ_RAWSTAT=0x%08x GPU_FAULTSTATUS=0x%08x", in kbase_debug_dump_registers()
1138 kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_RAWSTAT), NULL), in kbase_debug_dump_registers()
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| /device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/ |
| H A D | mali_kbase_gpu_regmap.h | 199 #define MMU_IRQ_RAWSTAT 0x000 /* (RW) Raw interrupt status register */ macro
251 * MMU_IRQ_RAWSTAT register values. Values are valid also for
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