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Help
Searched
refs:L2_PWRTRANS_LO
(Results
1 - 9
of
9
) sorted by relevance
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/
H
A
D
mali_kbase_gpu_regmap.h
141
#define
L2_PWRTRANS_LO
0x220 /* (RO) Level 2 cache power transition bitmap, low word */
macro
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H
A
D
mali_midg_regmap.h
169
#define
L2_PWRTRANS_LO
0x220 /* (RO) Level 2 cache power transition bitmap, low word */
macro
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H
A
D
mali_midg_regmap.h
175
#define
L2_PWRTRANS_LO
0x220 /* (RO) Level 2 cache power transition bitmap, low word */
macro
/device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/
H
A
D
mali_kbase_gpu_regmap.h
152
#define
L2_PWRTRANS_LO
0x220 /* (RO) Level 2 cache power transition bitmap, low word */
macro
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/
H
A
D
mali_kbase_pm_driver.c
883
kbase_reg_read(kbdev, GPU_CONTROL_REG(
L2_PWRTRANS_LO
), NULL));
in kbase_pm_check_transitions_sync()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/
H
A
D
mali_kbase_pm_driver.c
987
L2_PWRTRANS_LO
), NULL));
in kbase_pm_check_transitions_sync()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H
A
D
mali_kbase_model_dummy.c
1553
case GPU_CONTROL_REG(
L2_PWRTRANS_LO
):
H
A
D
mali_kbase_pm_driver.c
2139
L2_PWRTRANS_LO
)));
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H
A
D
mali_kbase_pm_driver.c
1613
kbase_reg_read(kbdev, GPU_CONTROL_REG(
L2_PWRTRANS_LO
)));
Completed in 18 milliseconds