Home
last modified time | relevance | path

Searched refs:JOB_IRQ_STATUS (Results 1 - 14 of 14) sorted by relevance

/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_debug_job_fault_backend.c34 static int job_control_reg_snapshot[] = {JOB_IRQ_MASK, JOB_IRQ_STATUS};
H A Dmali_kbase_irq_linux.c60 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_handler()
269 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_test_handler()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_debug_job_fault_backend.c38 JOB_IRQ_STATUS
H A Dmali_kbase_irq_linux.c56 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_handler()
237 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_test_handler()
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_debug_job_fault_backend.c27 static int job_control_reg_snapshot[] = {JOB_IRQ_MASK, JOB_IRQ_STATUS};
H A Dmali_kbase_irq_linux.c53 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_handler()
229 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_test_handler()
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_debug_job_fault_backend.c42 JOB_IRQ_STATUS
H A Dmali_kbase_model_linux.c51 JOB_CONTROL_REG(JOB_IRQ_STATUS)))) { in serve_job_irq()
H A Dmali_kbase_irq_linux.c59 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_handler()
271 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_test_handler()
H A Dmali_kbase_model_dummy.c1459 } else if (addr == JOB_CONTROL_REG(JOB_IRQ_STATUS)) {
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/
H A Dmali_kbase_gpu_regmap.h172 #define JOB_IRQ_STATUS 0x00C /* Interrupt status register */ macro
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h199 #define JOB_IRQ_STATUS 0x00C /* Interrupt status register */ macro
202 0x014 /* cycles to delay delivering an interrupt externally. The JOB_IRQ_STATUS is NOT affected by this, just the \
/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h206 #define JOB_IRQ_STATUS 0x00C /* Interrupt status register */ macro
208 #define JOB_IRQ_THROTTLE 0x014 /* cycles to delay delivering an interrupt externally. The JOB_IRQ_STATUS is NOT affected by this, just the delivery of the interrupt. */
/device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/
H A Dmali_kbase_gpu_regmap.h192 #define JOB_IRQ_STATUS 0x00C /* Interrupt status register */ macro

Completed in 13 milliseconds