/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/ |
H A D | mali_kbase_irq_linux.c | 60 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_handler() 269 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_test_handler() 282 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), val); in kbase_job_irq_test_handler() 341 rawstat_offset = JOB_CONTROL_REG(JOB_IRQ_RAWSTAT); in kbasep_common_test_interrupt() 342 mask_offset = JOB_CONTROL_REG(JOB_IRQ_MASK); in kbasep_common_test_interrupt()
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H A D | mali_kbase_jm_hw.c | 387 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), in kbase_job_done() 389 active = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_JS_STATE)); in kbase_job_done() 432 u32 rawstat = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)); in kbase_job_done() 472 done = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)); in kbase_job_done() 946 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)), in kbase_debug_dump_registers() 947 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_JS_STATE))); in kbase_debug_dump_registers() 951 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)), kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK)), in kbase_debug_dump_registers()
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H A D | mali_kbase_debug_job_fault_backend.c | 33 /* JOB_CONTROL_REG(r) */ 70 kctx->reg_dump[offset] = JOB_CONTROL_REG(job_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/ |
H A D | mali_kbase_dummy_job_wa.c | 135 done = wait_any(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT), in run_job() 137 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), done); in run_job() 176 old_job_mask = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK)); in kbase_dummy_job_wa_execute() 178 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), 0); in kbase_dummy_job_wa_execute() 232 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), old_job_mask); in kbase_dummy_job_wa_execute()
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/ |
H A D | mali_kbase_dummy_job_wa.c | 128 done = wait_any(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT), (1ul << (0x10 + slot)) | (1ul << slot)); in run_job() 129 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), done); in run_job() 167 old_job_mask = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK)); in kbase_dummy_job_wa_execute() 169 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), 0); in kbase_dummy_job_wa_execute() 225 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), old_job_mask); in kbase_dummy_job_wa_execute()
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/ |
H A D | mali_kbase_irq_linux.c | 53 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_handler() 229 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_test_handler() 242 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), val, NULL); in kbase_job_irq_test_handler() 301 rawstat_offset = JOB_CONTROL_REG(JOB_IRQ_RAWSTAT); in kbasep_common_test_interrupt() 302 mask_offset = JOB_CONTROL_REG(JOB_IRQ_MASK); in kbasep_common_test_interrupt()
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H A D | mali_kbase_jm_hw.c | 272 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), done & ((1 << i) | (1 << (i + 0x10))), NULL); in kbase_job_done() 273 active = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_JS_STATE), NULL); in kbase_job_done() 315 u32 rawstat = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT), NULL); in kbase_job_done() 355 done = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT), NULL); in kbase_job_done() 1014 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT), NULL), in kbase_debug_dump_registers() 1015 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_JS_STATE), NULL)); in kbase_debug_dump_registers() 1026 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), NULL), in kbase_debug_dump_registers()
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H A D | mali_kbase_debug_job_fault_backend.c | 26 /* JOB_CONTROL_REG(r) */ 63 kctx->reg_dump[offset] = JOB_CONTROL_REG(job_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
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H A D | mali_kbase_pm_driver.c | 912 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), 0xFFFFFFFF, NULL); in kbase_pm_enable_interrupts() 913 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), 0xFFFFFFFF, NULL); in kbase_pm_enable_interrupts() 932 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), 0, NULL); in kbase_pm_disable_interrupts_nolock() 933 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), 0xFFFFFFFF, NULL); in kbase_pm_disable_interrupts_nolock()
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
H A D | mali_kbase_irq_linux.c | 59 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_handler() 271 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS)); in kbase_job_irq_test_handler() 283 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), val); in kbase_job_irq_test_handler() 343 rawstat_offset = JOB_CONTROL_REG(JOB_IRQ_RAWSTAT); in kbasep_common_test_interrupt() 344 mask_offset = JOB_CONTROL_REG(JOB_IRQ_MASK); in kbasep_common_test_interrupt()
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H A D | mali_kbase_model_dummy.c | 1090 if ((addr >= JOB_CONTROL_REG(JOB_SLOT0)) && 1091 (addr < (JOB_CONTROL_REG(JOB_SLOT15) + 0x80))) { 1143 } else if (addr == JOB_CONTROL_REG(JOB_IRQ_CLEAR)) { 1158 } else if (addr == JOB_CONTROL_REG(JOB_IRQ_MASK)) { 1166 if (addr == JOB_CONTROL_REG(JOB_IRQ_CLEAR)) { 1171 } else if (addr == JOB_CONTROL_REG(JOB_IRQ_MASK)) { 1446 if (addr == JOB_CONTROL_REG(JOB_IRQ_JS_STATE)) { 1456 } else if (addr == JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)) { 1459 } else if (addr == JOB_CONTROL_REG(JOB_IRQ_STATUS)) { 1464 else if (addr == JOB_CONTROL_REG(JOB_IRQ_MAS [all...] |
H A D | mali_kbase_jm_hw.c | 472 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), in kbase_job_done() 475 JOB_CONTROL_REG(JOB_IRQ_JS_STATE)); in kbase_job_done() 520 JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)); in kbase_job_done() 571 JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)); in kbase_job_done() 1060 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)), in kbase_debug_dump_registers() 1061 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_JS_STATE))); in kbase_debug_dump_registers() 1072 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK)), in kbase_debug_dump_registers()
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H A D | mali_kbase_debug_job_fault_backend.c | 39 /* JOB_CONTROL_REG(r) */ 106 JOB_CONTROL_REG(job_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
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H A D | mali_kbase_model_linux.c | 51 JOB_CONTROL_REG(JOB_IRQ_STATUS)))) { in serve_job_irq()
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H A D | mali_kbase_pm_driver.c | 2240 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), 0xFFFFFFFF); 2241 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), 0xFFFFFFFF); 2265 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), 0); 2266 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), 0xFFFFFFFF);
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
H A D | mali_kbase_irq_linux.c | 56 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_handler() 237 val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS), NULL); in kbase_job_irq_test_handler() 249 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), val, NULL); in kbase_job_irq_test_handler() 310 rawstat_offset = JOB_CONTROL_REG(JOB_IRQ_RAWSTAT); in kbasep_common_test_interrupt() 311 mask_offset = JOB_CONTROL_REG(JOB_IRQ_MASK); in kbasep_common_test_interrupt()
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H A D | mali_kbase_jm_hw.c | 315 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), in kbase_job_done() 319 JOB_CONTROL_REG(JOB_IRQ_JS_STATE), in kbase_job_done() 365 JOB_CONTROL_REG(JOB_IRQ_RAWSTAT), NULL); in kbase_job_done() 415 JOB_CONTROL_REG(JOB_IRQ_RAWSTAT), NULL); in kbase_job_done() 1128 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT), NULL), in kbase_debug_dump_registers() 1129 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_JS_STATE), NULL)); in kbase_debug_dump_registers() 1142 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), NULL), in kbase_debug_dump_registers()
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H A D | mali_kbase_debug_job_fault_backend.c | 35 /* JOB_CONTROL_REG(r) */ 100 JOB_CONTROL_REG(job_control_reg_snapshot[i]); in kbase_debug_job_fault_reg_snapshot_init()
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H A D | mali_kbase_pm_driver.c | 1018 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), 0xFFFFFFFF, in kbase_pm_enable_interrupts() 1020 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), 0xFFFFFFFF, NULL); in kbase_pm_enable_interrupts() 1040 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK), 0, NULL); in kbase_pm_disable_interrupts_nolock() 1041 kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), 0xFFFFFFFF, in kbase_pm_disable_interrupts_nolock()
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/backend/ |
H A D | mali_kbase_gpu_regmap_jm.h | 143 #define JOB_SLOT_REG(n, r) (JOB_CONTROL_REG(JOB_SLOT0 + ((n) << 7)) + (r))
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
H A D | mali_midg_regmap.h | 194 #define JOB_CONTROL_REG(r) (JOB_CONTROL_BASE + (r)) macro 222 #define JOB_SLOT_REG(n, r) (JOB_CONTROL_REG(JOB_SLOT0 + ((n) << 7)) + (r))
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
H A D | mali_midg_regmap.h | 201 #define JOB_CONTROL_REG(r) (JOB_CONTROL_BASE + (r)) macro 227 #define JOB_SLOT_REG(n, r) (JOB_CONTROL_REG(JOB_SLOT0 + ((n) << 7)) + (r))
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/csf/ |
H A D | mali_kbase_csf_reset_gpu.c | 244 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_RAWSTAT)), in kbase_csf_debug_dump_registers() 249 kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_MASK)), in kbase_csf_debug_dump_registers()
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/device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/backend/ |
H A D | mali_kbase_gpu_regmap_jm.h | 132 #define JOB_SLOT_REG(n, r) (JOB_CONTROL_REG(JOB_SLOT0 + ((n) << 7)) + (r))
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/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/ |
H A D | mali_kbase_gpu_regmap.h | 167 #define JOB_CONTROL_REG(r) (JOB_CONTROL_BASE + (r)) macro
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