| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/ |
| H A D | mali_kutf_irq_test_main.c | 191 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), in mali_kutf_irq_latency()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/device/ |
| H A D | mali_kbase_device_hw.c | 51 !(kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)) & in busy_wait_cache_clean_irq()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/tests/mali_kutf_irq_test/ |
| H A D | mali_kutf_irq_test_main.c | 199 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), in mali_kutf_irq_latency()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/ |
| H A D | mali_kbase_gpu_regmap.h | 43 #define GPU_IRQ_RAWSTAT 0x020 /* (RW) */ macro
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_pm_driver.c | 149 raw = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL); in mali_cci_flush_l2()
154 raw = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL); in mali_cci_flush_l2()
1298 if (kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL) & RESET_COMPLETED) { in kbase_pm_do_reset()
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| H A D | mali_kbase_jm_hw.c | 1010 dev_err(kbdev->dev, " GPU_IRQ_RAWSTAT=0x%08x GPU_STATUS=0x%08x", in kbase_debug_dump_registers()
1011 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL), in kbase_debug_dump_registers()
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| H A D | mali_kbase_jm_rb.c | 1599 (kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL) & CLEAN_CACHES_COMPLETED) == 0) { in kbase_gpu_cacheclean()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_pm_driver.c | 160 GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), in mali_cci_flush_l2()
167 GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), in mali_cci_flush_l2()
1433 if (kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL) & in kbase_pm_do_reset()
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| H A D | mali_kbase_jm_hw.c | 1124 dev_err(kbdev->dev, " GPU_IRQ_RAWSTAT=0x%08x GPU_STATUS=0x%08x", in kbase_debug_dump_registers()
1125 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL), in kbase_debug_dump_registers()
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| H A D | mali_kbase_jm_rb.c | 1831 (kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL) & in kbase_gpu_cacheclean()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_instr_backend.c | 333 mcu_gpu_irq_raw_status = kbase_reg_read(kbdev, GPU_CONTROL_MCU_REG(GPU_IRQ_RAWSTAT)); in kbasep_hwcnt_irq_poll_tasklet()
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| H A D | mali_kbase_pm_driver.c | 250 raw = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)); in mali_cci_flush_l2()
255 raw = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)); in mali_cci_flush_l2()
2174 if ((kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)) & RESET_COMPLETED)) {
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| H A D | mali_kbase_jm_hw.c | 942 dev_err(kbdev->dev, " GPU_IRQ_RAWSTAT=0x%08x GPU_STATUS=0x%08x", in kbase_debug_dump_registers()
943 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)), in kbase_debug_dump_registers()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
| H A D | mali_midg_regmap.h | 35 #define GPU_IRQ_RAWSTAT 0x020 /* (RW) */ macro
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
| H A D | mali_midg_regmap.h | 39 #define GPU_IRQ_RAWSTAT 0x020 /* (RW) */ macro
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/csf/ |
| H A D | mali_kbase_csf_reset_gpu.c | 239 dev_err(kbdev->dev, " GPU_IRQ_RAWSTAT=0x%08x GPU_STATUS=0x%08x MCU_STATUS=0x%08x", in kbase_csf_debug_dump_registers()
240 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)), in kbase_csf_debug_dump_registers()
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| /device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/ |
| H A D | mali_kbase_gpu_regmap.h | 51 #define GPU_IRQ_RAWSTAT 0x020 /* (RW) */ macro
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_pm_driver.c | 283 GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)); in mali_cci_flush_l2()
290 GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)); in mali_cci_flush_l2()
2823 if ((kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)) &
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| H A D | mali_kbase_jm_hw.c | 1056 dev_err(kbdev->dev, " GPU_IRQ_RAWSTAT=0x%08x GPU_STATUS=0x%08x", in kbase_debug_dump_registers()
1057 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)), in kbase_debug_dump_registers()
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| H A D | mali_kbase_model_dummy.c | 56 * GPU_IRQ_RAWSTAT
1481 } else if (addr == GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)) {
1486 pr_debug("GPU_IRQ_RAWSTAT read %x", *value);
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