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Help
Searched
refs:GICD_CTLR
(Results
1 - 2
of
2
) sorted by relevance
/device/soc/rockchip/common/sdk_linux/include/linux/irqchip/
H
A
D
arm-gic-v3.h
13
#define
GICD_CTLR
0x0000
macro
112
#define GICR_CTLR
GICD_CTLR
/device/soc/rockchip/common/sdk_linux/drivers/irqchip/
H
A
D
irq-gic-v3.c
129
* When GIC security is enabled (
GICD_CTLR
.DS == 0), the interrupt priority
226
while (readl_relaxed(base +
GICD_CTLR
) & bit) {
in gic_do_wait_for_rwp()
808
writel_relaxed(0, base +
GICD_CTLR
);
in gic_dist_init()
849
writel_relaxed(val, base +
GICD_CTLR
);
in gic_dist_init()
1004
return readl_relaxed(gic_data.dist_base +
GICD_CTLR
) & GICD_CTLR_DS;
in gic_dist_security_disabled()
Completed in 6 milliseconds