Searched refs:CYCLE_COUNT_LO (Results 1 - 9 of 9) sorted by relevance
| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_time.c | 34 *cycle_counter = kbase_reg_read(kbdev, GPU_CONTROL_REG(CYCLE_COUNT_LO), NULL); in kbase_backend_get_gpu_time()
81 new_count = kbase_reg_read(kctx->kbdev, GPU_CONTROL_REG(CYCLE_COUNT_LO), NULL); in kbase_wait_write_flush()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_time.c | 36 GPU_CONTROL_REG(CYCLE_COUNT_LO), NULL); in kbase_backend_get_gpu_time()
88 GPU_CONTROL_REG(CYCLE_COUNT_LO), NULL); in kbase_wait_write_flush()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_time.c | 37 *cycle_counter = kbase_reg_read(kbdev, GPU_CONTROL_REG(CYCLE_COUNT_LO)); in kbase_backend_get_gpu_time_norequest()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_time.c | 161 GPU_CONTROL_REG(CYCLE_COUNT_LO)); in kbase_backend_get_cycle_cnt()
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| H A D | mali_kbase_model_dummy.c | 1730 } else if (addr >= GPU_CONTROL_REG(CYCLE_COUNT_LO)
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/gpu/ |
| H A D | mali_kbase_gpu_regmap.h | 69 #define CYCLE_COUNT_LO 0x090 /* (RO) Cycle counter, low word */ macro
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
| H A D | mali_midg_regmap.h | 80 #define CYCLE_COUNT_LO 0x090 /* (RO) Cycle counter, low word */ macro
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
| H A D | mali_midg_regmap.h | 82 #define CYCLE_COUNT_LO 0x090 /* (RO) Cycle counter, low word */ macro
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| /device/soc/rockchip/rk3588/kernel/include/uapi/gpu/arm/bifrost/gpu/ |
| H A D | mali_kbase_gpu_regmap.h | 80 #define CYCLE_COUNT_LO 0x090 /* (RO) Cycle counter, low word */ macro
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