/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/ |
H A D | clk-rk3328.c | 232 COMPOSITE_NOMUX(0, "pclk_dbg", "armclk", CLK_IS_CRITICAL, RK3328_CLKSEL_CON(1), 0, 4, 234 COMPOSITE_NOMUX(0, "aclk_core", "armclk", CLK_IS_CRITICAL, RK3328_CLKSEL_CON(1), 4, 3, 236 GATE(0, "aclk_core_niu", "aclk_core", CLK_IS_CRITICAL, RK3328_CLKGATE_CON(13), 0, GFLAGS), 237 GATE(0, "aclk_gic400", "aclk_core", CLK_IS_CRITICAL, RK3328_CLKGATE_CON(13), 1, GFLAGS), 239 GATE(0, "clk_jtag", "jtag_clkin", CLK_IS_CRITICAL, RK3328_CLKGATE_CON(7), 2, GFLAGS), 245 GATE(0, "aclk_gpu_niu", "aclk_gpu_pre", CLK_IS_CRITICAL, RK3328_CLKGATE_CON(14), 1, GFLAGS), 248 COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IS_CRITICAL, RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, 250 GATE(0, "clk_ddrmsch", "clk_ddr", CLK_IS_CRITICAL, RK3328_CLKGATE_CON(18), 6, GFLAGS), 251 GATE(0, "clk_ddrupctl", "clk_ddr", CLK_IS_CRITICAL, RK3328_CLKGATE_CON(18), 5, GFLAGS), 255 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_2plls_hdmiphy_p, CLK_IS_CRITICAL, RK3328_CLKSEL_CO [all...] |
H A D | clk-rk3228.c | 226 GATE(0, "hdmiphy_aclk_cpu", "hdmiphy", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 1, GFLAGS), 227 GATE(0, "gpll_aclk_cpu", "gpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 1, GFLAGS), 228 GATE(0, "cpll_aclk_cpu", "cpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 1, GFLAGS), 229 COMPOSITE_NOGATE(0, "aclk_cpu_src", mux_aclk_cpu_src_p, CLK_IS_CRITICAL, RK2928_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, 231 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(6), 0, GFLAGS), 232 COMPOSITE_NOMUX(HCLK_CPU, "hclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(1), 8, 2, DFLAGS, 234 COMPOSITE_NOMUX(0, "pclk_bus_src", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(1), 12, 3, DFLAGS, 236 GATE(PCLK_CPU, "pclk_cpu", "pclk_bus_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(6), 3, GFLAGS), 237 GATE(0, "pclk_phy_pre", "pclk_bus_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(6), 4, GFLAGS), 238 GATE(0, "pclk_ddr_pre", "pclk_bus_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CO [all...] |
H A D | clk-rk3399.c | 235 [ppll] = PLL(pll_rk3399, PLL_PPLL, "ppll", mux_pll_p, CLK_IS_CRITICAL, RK3399_PMU_PLL_CON(0), RK3399_PMU_PLL_CON(3), 389 GATE(ACLK_USB3_NOC, "aclk_usb3_noc", "aclk_usb3", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(30), 0, GFLAGS), 477 GATE(ACLK_GMAC_NOC, "aclk_gmac_noc", "aclk_gmac_pre", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(32), 1, GFLAGS), 483 GATE(PCLK_GMAC_NOC, "pclk_gmac_noc", "pclk_gmac_pre", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(32), 3, GFLAGS), 549 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_pll_src_cpll_gpll_p, CLK_IS_CRITICAL, RK3399_CLKSEL_CON(6), 15, 1, MFLAGS, 8, 5, 552 GATE(PCLK_CENTER_MAIN_NOC, "pclk_center_main_noc", "pclk_ddr", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(18), 10, GFLAGS), 562 GATE(0, "cpll_aclk_cci_src", "cpll", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(2), 0, GFLAGS), 563 GATE(0, "gpll_aclk_cci_src", "gpll", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(2), 1, GFLAGS), 564 GATE(0, "npll_aclk_cci_src", "npll", CLK_IS_CRITICAL, RK3399_CLKGATE_CON(2), 2, GFLAGS), 565 GATE(0, "vpll_aclk_cci_src", "vpll", CLK_IS_CRITICAL, RK3399_CLKGATE_CO [all...] |
H A D | clk-rk3128.c | 214 COMPOSITE(0, "aclk_cpu_src", mux_aclk_cpu_src_p, CLK_IS_CRITICAL, RK2928_CLKSEL_CON(0), 13, 2, MFLAGS, 8, 5, DFLAGS, 216 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 3, GFLAGS), 217 COMPOSITE_NOMUX(HCLK_CPU, "hclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(1), 8, 2, DFLAGS, 219 COMPOSITE_NOMUX(PCLK_CPU, "pclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(1), 12, 2, DFLAGS, 237 COMPOSITE(ACLK_VIO0, "aclk_vio0", mux_pll_src_5plls_p, CLK_IS_CRITICAL, RK2928_CLKSEL_CON(31), 5, 3, MFLAGS, 0, 5, 241 FACTOR_GATE(HCLK_VIO, "hclk_vio", "aclk_vio0", CLK_IS_CRITICAL, 1, 4, RK2928_CLKGATE_CON(0), 11, GFLAGS), 244 GATE(0, "gpll_peri", "gpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(2), 0, GFLAGS), 245 GATE(0, "cpll_peri", "cpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(2), 0, GFLAGS), 246 GATE(0, "gpll_div2_peri", "gpll_div2", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(2), 0, GFLAGS), 247 GATE(0, "gpll_div3_peri", "gpll_div3", CLK_IS_CRITICAL, RK2928_CLKGATE_CO [all...] |
H A D | clk-rv1108.c | 190 GATE(ACLK_CORE, "aclk_core", "aclkenm_core", CLK_IS_CRITICAL, RV1108_CLKGATE_CON(11), 0, GFLAGS), 224 COMPOSITE_NOMUX(0, "pmu_24m_ena", "gpll", CLK_IS_CRITICAL, RV1108_CLKSEL_CON(38), 0, 5, DFLAGS, 226 GATE(0, "pclk_pmu", "pmu_24m_ena", CLK_IS_CRITICAL, RV1108_CLKGATE_CON(10), 0, GFLAGS), 250 GATE(0, "pclk_acodecphy", "pclk_top_pre", CLK_IS_CRITICAL, RV1108_CLKGATE_CON(14), 6, GFLAGS), 389 GATE(0, "aclk_bus_src_gpll", "gpll", CLK_IS_CRITICAL, RV1108_CLKGATE_CON(1), 0, GFLAGS), 390 GATE(0, "aclk_bus_src_apll", "apll", CLK_IS_CRITICAL, RV1108_CLKGATE_CON(1), 1, GFLAGS), 391 GATE(0, "aclk_bus_src_dpll", "dpll", CLK_IS_CRITICAL, RV1108_CLKGATE_CON(1), 2, GFLAGS), 392 COMPOSITE_NOGATE(ACLK_PRE, "aclk_bus_pre", mux_aclk_bus_src_p, CLK_IS_CRITICAL, RV1108_CLKSEL_CON(2), 8, 2, MFLAGS, 394 COMPOSITE_NOMUX(HCLK_BUS, "hclk_bus_pre", "aclk_bus_pre", CLK_IS_CRITICAL, RV1108_CLKSEL_CON(3), 0, 5, DFLAGS, 396 COMPOSITE_NOMUX(0, "pclk_bus_pre", "aclk_bus_pre", CLK_IS_CRITICAL, RV1108_CLKSEL_CO [all...] |
H A D | clk-rk3036.c | 191 GATE(0, "dpll_cpu", "dpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(10), 8, GFLAGS), 192 GATE(0, "gpll_cpu", "gpll", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 1, GFLAGS), 193 COMPOSITE_NOGATE(0, "aclk_cpu_src", mux_busclk_p, CLK_IS_CRITICAL, RK2928_CLKSEL_CON(0), 14, 2, MFLAGS, 8, 5, 195 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 3, GFLAGS), 196 COMPOSITE_NOMUX(PCLK_CPU, "pclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(1), 12, 3, 198 COMPOSITE_NOMUX(HCLK_CPU, "hclk_cpu", "aclk_cpu_src", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(1), 8, 2, 201 COMPOSITE(0, "aclk_peri_src", mux_pll_src_3plls_p, CLK_IS_CRITICAL, RK2928_CLKSEL_CON(10), 14, 2, MFLAGS, 0, 5, 204 GATE(ACLK_PERI, "aclk_peri", "aclk_peri_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(2), 1, GFLAGS), 205 DIV(0, "pclk_peri_src", "aclk_peri_src", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(10), 12, 2, 207 GATE(PCLK_PERI, "pclk_peri", "pclk_peri_src", CLK_IS_CRITICAL, RK2928_CLKGATE_CO [all...] |
H A D | clk-rk3368.c | 311 GATE(0, "gpll_aclk_bus", "gpll", CLK_IS_CRITICAL, RK3368_CLKGATE_CON(1), 10, GFLAGS), 312 GATE(0, "cpll_aclk_bus", "cpll", CLK_IS_CRITICAL, RK3368_CLKGATE_CON(1), 11, GFLAGS), 313 COMPOSITE_NOGATE(0, "aclk_bus_src", mux_aclk_bus_src_p, CLK_IS_CRITICAL, RK3368_CLKSEL_CON(8), 7, 1, MFLAGS, 0, 5, 316 GATE(ACLK_BUS, "aclk_bus", "aclk_bus_src", CLK_IS_CRITICAL, RK3368_CLKGATE_CON(1), 0, GFLAGS), 317 COMPOSITE_NOMUX(PCLK_BUS, "pclk_bus", "aclk_bus_src", CLK_IS_CRITICAL, RK3368_CLKSEL_CON(8), 12, 3, DFLAGS, 319 COMPOSITE_NOMUX(HCLK_BUS, "hclk_bus", "aclk_bus_src", CLK_IS_CRITICAL, RK3368_CLKSEL_CON(8), 8, 2, DFLAGS, 418 DIV(0, "pclk_pd_alive", "gpll", CLK_IS_CRITICAL, RK3368_CLKSEL_CON(10), 8, 5, DFLAGS), 422 COMPOSITE_NOMUX(0, "pclk_pd_pmu", "gpll", CLK_IS_CRITICAL, RK3368_CLKSEL_CON(10), 0, 5, DFLAGS, 434 COMPOSITE(0, "aclk_peri_src", mux_pll_src_cpll_gpll_p, CLK_IS_CRITICAL, RK3368_CLKSEL_CON(9), 7, 1, MFLAGS, 0, 5, 436 COMPOSITE_NOMUX(PCLK_PERI, "pclk_peri", "aclk_peri_src", CLK_IS_CRITICAL, RK3368_CLKSEL_CO [all...] |
H A D | clk-px30.c | 159 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p, CLK_IS_CRITICAL, PX30_PLL_CON(24), PX30_MODE_CON, 6, 4, 0, 246 GATE(0, "aclk_gpu_niu", "aclk_gpu", CLK_IS_CRITICAL, PX30_CLKGATE_CON(0), 11, GFLAGS), 338 COMPOSITE_NODIV(ACLK_PERI_SRC, "aclk_peri_src", mux_gpll_cpll_p, CLK_IS_CRITICAL, PX30_CLKSEL_CON(14), 15, 1, 340 COMPOSITE_NOMUX(ACLK_PERI_PRE, "aclk_peri_pre", "aclk_peri_src", CLK_IS_CRITICAL, PX30_CLKSEL_CON(14), 0, 5, DFLAGS, 342 DIV(HCLK_PERI_PRE, "hclk_peri_pre", "aclk_peri_src", CLK_IS_CRITICAL, PX30_CLKSEL_CON(14), 8, 5, DFLAGS), 389 GATE(HCLK_USB, "hclk_usb", "hclk_peri_pre", CLK_IS_CRITICAL, PX30_CLKGATE_CON(7), 2, GFLAGS), 415 COMPOSITE_NODIV(ACLK_BUS_SRC, "aclk_bus_src", mux_gpll_cpll_p, CLK_IS_CRITICAL, PX30_CLKSEL_CON(23), 15, 1, MFLAGS, 417 COMPOSITE_NOMUX(HCLK_BUS_PRE, "hclk_bus_pre", "aclk_bus_src", CLK_IS_CRITICAL, PX30_CLKSEL_CON(24), 0, 5, DFLAGS, 419 COMPOSITE_NOMUX(ACLK_BUS_PRE, "aclk_bus_pre", "aclk_bus_src", CLK_IS_CRITICAL, PX30_CLKSEL_CON(23), 8, 5, DFLAGS, 421 COMPOSITE_NOMUX(PCLK_BUS_PRE, "pclk_bus_pre", "aclk_bus_pre", CLK_IS_CRITICAL, PX30_CLKSEL_CO [all...] |
H A D | clk-rk3288.c | 257 GATE(0, "gpll_aclk_cpu", "gpll", CLK_IS_CRITICAL, RK3288_CLKGATE_CON(0), 10, GFLAGS), 258 GATE(0, "cpll_aclk_cpu", "cpll", CLK_IS_CRITICAL, RK3288_CLKGATE_CON(0), 11, GFLAGS), 259 COMPOSITE_NOGATE(0, "aclk_cpu_src", mux_aclk_cpu_src_p, CLK_IS_CRITICAL, RK3288_CLKSEL_CON(1), 15, 1, MFLAGS, 3, 5, 262 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", CLK_IS_CRITICAL, RK3288_CLKGATE_CON(0), 3, GFLAGS), 263 COMPOSITE_NOMUX(PCLK_CPU, "pclk_cpu", "aclk_cpu_pre", CLK_IS_CRITICAL, RK3288_CLKSEL_CON(1), 12, 3, DFLAGS, 265 COMPOSITE_NOMUX_DIVTBL(HCLK_CPU, "hclk_cpu", "aclk_cpu_pre", CLK_IS_CRITICAL, RK3288_CLKSEL_CON(1), 8, 2, DFLAGS, 360 DIV(PCLK_PD_ALIVE, "pclk_pd_alive", "gpll", CLK_IS_CRITICAL, RK3288_CLKSEL_CON(33), 8, 5, DFLAGS), 361 COMPOSITE_NOMUX(PCLK_PD_PMU, "pclk_pd_pmu", "gpll", CLK_IS_CRITICAL, RK3288_CLKSEL_CON(33), 0, 5, DFLAGS, 367 COMPOSITE(0, "aclk_peri_src", mux_pll_src_cpll_gpll_p, CLK_IS_CRITICAL, RK3288_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, 369 COMPOSITE_NOMUX(PCLK_PERI, "pclk_peri", "aclk_peri_src", CLK_IS_CRITICAL, RK3288_CLKSEL_CO [all...] |
H A D | clk-rk3188.c | 279 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 3, GFLAGS), 282 GATE(PCLK_CPU, "pclk_cpu", "pclk_cpu_pre", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 5, GFLAGS), 283 GATE(HCLK_CPU, "hclk_cpu", "hclk_cpu_pre", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(0), 4, GFLAGS), 290 GATE(ACLK_PERI, "aclk_peri", "aclk_peri_pre", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(2), 1, GFLAGS), 291 COMPOSITE_NOMUX(HCLK_PERI, "hclk_peri", "aclk_peri_pre", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(10), 8, 2, 293 COMPOSITE_NOMUX(PCLK_PERI, "pclk_peri", "aclk_peri_pre", CLK_IS_CRITICAL, RK2928_CLKSEL_CON(10), 12, 2, 315 GATE(0, "sclk_mac_lbtest", "sclk_macref", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(2), 12, GFLAGS), 384 GATE(0, "hclk_cpubus", "hclk_cpu", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(4), 8, GFLAGS), 386 GATE(0, "hclk_vio_bus", "hclk_cpu", CLK_IS_CRITICAL, RK2928_CLKGATE_CON(6), 12, GFLAGS), 491 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_gpll_cpll_p, CLK_IS_CRITICAL, RK2928_CLKSEL_CO [all...] |
H A D | clk-rk3308.c | 268 COMPOSITE_NODIV(ACLK_BUS_SRC, "clk_bus_src", mux_dpll_vpll0_vpll1_p, CLK_IS_CRITICAL, RK3308_CLKSEL_CON(5), 6, 2, 270 COMPOSITE_NOMUX(PCLK_BUS, "pclk_bus", "clk_bus_src", CLK_IS_CRITICAL, RK3308_CLKSEL_CON(6), 8, 5, DFLAGS, 273 COMPOSITE_NOMUX(HCLK_BUS, "hclk_bus", "clk_bus_src", CLK_IS_CRITICAL, RK3308_CLKSEL_CON(6), 0, 5, DFLAGS, 275 COMPOSITE_NOMUX(ACLK_BUS, "aclk_bus", "clk_bus_src", CLK_IS_CRITICAL, RK3308_CLKSEL_CON(5), 0, 5, DFLAGS, 363 COMPOSITE_NODIV(ACLK_PERI_SRC, "clk_peri_src", mux_dpll_vpll0_vpll1_p, CLK_IS_CRITICAL, RK3308_CLKSEL_CON(36), 6, 2, 365 COMPOSITE_NOMUX(ACLK_PERI, "aclk_peri", "clk_peri_src", CLK_IS_CRITICAL, RK3308_CLKSEL_CON(36), 0, 5, DFLAGS, 367 COMPOSITE_NOMUX(HCLK_PERI, "hclk_peri", "clk_peri_src", CLK_IS_CRITICAL, RK3308_CLKSEL_CON(37), 0, 5, DFLAGS, 369 COMPOSITE_NOMUX(PCLK_PERI, "pclk_peri", "clk_peri_src", CLK_IS_CRITICAL, RK3308_CLKSEL_CON(37), 8, 5, DFLAGS, 435 COMPOSITE(SCLK_DDRCLK, "clk_ddrphy4x_src", mux_dpll_vpll0_vpll1_p, CLK_IS_CRITICAL, RK3308_CLKSEL_CON(1), 6, 2, 437 GATE(0, "clk_ddrphy4x", "clk_ddrphy4x_src", CLK_IS_CRITICAL, RK3308_CLKGATE_CO [all...] |
/device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/ |
H A D | clk-rk3588.c | 680 COMPOSITE(CLK_50M_SRC, "clk_50m_src", gpll_cpll_p, CLK_IS_CRITICAL, 683 COMPOSITE(CLK_100M_SRC, "clk_100m_src", gpll_cpll_p, CLK_IS_CRITICAL, 686 COMPOSITE(CLK_150M_SRC, "clk_150m_src", gpll_cpll_p, CLK_IS_CRITICAL, 689 COMPOSITE(CLK_200M_SRC, "clk_200m_src", gpll_cpll_p, CLK_IS_CRITICAL, 692 COMPOSITE(CLK_250M_SRC, "clk_250m_src", gpll_cpll_p, CLK_IS_CRITICAL, 695 COMPOSITE(CLK_300M_SRC, "clk_300m_src", gpll_cpll_p, CLK_IS_CRITICAL, 698 COMPOSITE(CLK_350M_SRC, "clk_350m_src", gpll_spll_p, CLK_IS_CRITICAL, 701 COMPOSITE(CLK_400M_SRC, "clk_400m_src", gpll_cpll_p, CLK_IS_CRITICAL, 707 COMPOSITE(CLK_500M_SRC, "clk_500m_src", gpll_cpll_p, CLK_IS_CRITICAL, 710 COMPOSITE(CLK_600M_SRC, "clk_600m_src", gpll_cpll_p, CLK_IS_CRITICAL, [all...] |
/device/soc/rockchip/common/vendor/drivers/clk/ |
H A D | clk-rk1808.c | 265 COMPOSITE_NOMUX(MSCLK_CORE_NIU, "msclk_core_niu", "gpll", CLK_IS_CRITICAL, RK1808_CLKSEL_CON(18), 0, 5, DFLAGS, 272 COMPOSITE(ACLK_GIC_PRE, "aclk_gic_pre", mux_gpll_cpll_p, CLK_IS_CRITICAL, RK1808_CLKSEL_CON(15), 11, 1, MFLAGS, 12, 274 GATE(0, "aclk_gic_niu", "aclk_gic_pre", CLK_IS_CRITICAL, RK1808_CLKGATE_CON(1), 1, GFLAGS), 275 GATE(ACLK_GIC, "aclk_gic", "aclk_gic_pre", CLK_IS_CRITICAL, RK1808_CLKGATE_CON(1), 2, GFLAGS), 305 GATE(0, "aclk_npu_niu", "aclk_npu_pre", CLK_IS_CRITICAL, RK1808_CLKGATE_CON(1), 13, GFLAGS), 309 GATE(0, "hclk_npu_niu", "hclk_npu_pre", CLK_IS_CRITICAL, RK1808_CLKGATE_CON(1), 14, GFLAGS), 313 COMPOSITE(ACLK_IMEM_PRE, "aclk_imem_pre", mux_gpll_cpll_p, CLK_IS_CRITICAL, RK1808_CLKSEL_CON(17), 7, 1, MFLAGS, 0, 316 GATE(0, "aclk_imem0_niu", "aclk_imem_pre", CLK_IS_CRITICAL, RK1808_CLKGATE_CON(7), 10, GFLAGS), 318 GATE(0, "aclk_imem1_niu", "aclk_imem_pre", CLK_IS_CRITICAL, RK1808_CLKGATE_CON(7), 11, GFLAGS), 320 GATE(0, "aclk_imem2_niu", "aclk_imem_pre", CLK_IS_CRITICAL, RK1808_CLKGATE_CO [all...] |
/device/soc/rockchip/rk3566/vendor/drivers/clk/ |
H A D | clk-rk3568.c | 313 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p, CLK_IS_CRITICAL, RK3568_PLL_CON(32), RK3568_MODE_CON0, 10, 5, 430 COMPOSITE(0, "sclk_core_src", apll_gpll_npll_p, CLK_IS_CRITICAL, RK3568_CLKSEL_CON(2), 8, 2, MFLAGS, 0, 4, 432 COMPOSITE_NODIV(0, "sclk_core", sclk_core_pre_p, CLK_IS_CRITICAL, RK3568_CLKSEL_CON(2), 15, 1, MFLAGS, 435 COMPOSITE_NOMUX(0, "atclk_core", "armclk", CLK_IS_CRITICAL, RK3568_CLKSEL_CON(3), 0, 5, 437 COMPOSITE_NOMUX(0, "gicclk_core", "armclk", CLK_IS_CRITICAL, RK3568_CLKSEL_CON(3), 8, 5, 439 COMPOSITE_NOMUX(0, "pclk_core_pre", "armclk", CLK_IS_CRITICAL, RK3568_CLKSEL_CON(4), 0, 5, 441 COMPOSITE_NOMUX(0, "periphclk_core_pre", "armclk", CLK_IS_CRITICAL, RK3568_CLKSEL_CON(4), 8, 5, 443 COMPOSITE_NOMUX(0, "tsclk_core", "periphclk_core_pre", CLK_IS_CRITICAL, RK3568_CLKSEL_CON(5), 0, 4, 445 COMPOSITE_NOMUX(0, "cntclk_core", "periphclk_core_pre", CLK_IS_CRITICAL, RK3568_CLKSEL_CON(5), 4, 4, 447 COMPOSITE_NOMUX(0, "aclk_core", "sclk_core", CLK_IS_CRITICAL, RK3568_CLKSEL_CO [all...] |
/device/soc/rockchip/common/sdk_linux/include/linux/ |
H A D | clk-provider.h | 30 #define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */
macro
|