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Searched refs:CLK_DIVIDER_READ_ONLY (Results 1 - 16 of 16) sorted by relevance

/device/soc/rockchip/common/sdk_linux/drivers/clk/rockchip/
H A Dclk-rk3036.c187 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 7, GFLAGS),
189 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 7, GFLAGS),
197 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 5, GFLAGS),
199 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 4, GFLAGS),
H A Dclk-rk3288.c231 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 0, GFLAGS),
233 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 1, GFLAGS),
235 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 2, GFLAGS),
237 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 3, GFLAGS),
239 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 4, GFLAGS),
241 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 5, GFLAGS),
243 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 6, GFLAGS),
244 COMPOSITE_NOMUX(0, "atclk", "armclk", 0, RK3288_CLKSEL_CON(37), 4, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
247 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3288_CLKGATE_CON(12), 8, GFLAGS),
H A Dclk-rk3368.c283 DIV(0, "aclkm_core_b", "armclkb", 0, RK3368_CLKSEL_CON(0), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
284 DIV(0, "atclk_core_b", "armclkb", 0, RK3368_CLKSEL_CON(1), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
285 DIV(0, "pclk_dbg_b", "armclkb", 0, RK3368_CLKSEL_CON(1), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
287 DIV(0, "aclkm_core_l", "armclkl", 0, RK3368_CLKSEL_CON(2), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
288 DIV(0, "atclk_core_l", "armclkl", 0, RK3368_CLKSEL_CON(3), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
289 DIV(0, "pclk_dbg_l", "armclkl", 0, RK3368_CLKSEL_CON(3), 8, 5, DFLAGS | CLK_DIVIDER_READ_ONLY),
H A Dclk-rk3188.c266 DFLAGS | CLK_DIVIDER_READ_ONLY, div_core_peri_t, RK2928_CLKGATE_CON(0), 0, GFLAGS),
481 DIVTBL(0, "aclk_cpu_pre", "armclk", 0, RK2928_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY, div_aclk_cpu_t),
483 DFLAGS | CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY),
485 DFLAGS | CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY),
487 DFLAGS | CLK_DIVIDER_POWER_OF_TWO | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(4), 9, GFLAGS),
558 DFLAGS | CLK_DIVIDER_READ_ONLY, div_rk3188_aclk_core_t, RK2928_CLKGATE_CON(0), 7, GFLAGS),
H A Dclk-rk3399.c423 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3399_CLKGATE_CON(0), 4, GFLAGS),
425 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3399_CLKGATE_CON(0), 5, GFLAGS),
427 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3399_CLKGATE_CON(0), 6, GFLAGS),
447 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3399_CLKGATE_CON(1), 4, GFLAGS),
449 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3399_CLKGATE_CON(1), 5, GFLAGS),
451 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3399_CLKGATE_CON(1), 6, GFLAGS),
464 DFLAGS | CLK_DIVIDER_READ_ONLY),
H A Dclk-rk3128.c206 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 0, GFLAGS),
208 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(0), 7, GFLAGS),
H A Dclk-rk3328.c233 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3328_CLKGATE_CON(7), 0, GFLAGS),
235 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3328_CLKGATE_CON(7), 1, GFLAGS),
H A Dclk-rv1108.c187 DFLAGS | CLK_DIVIDER_READ_ONLY, RV1108_CLKGATE_CON(0), 5, GFLAGS),
189 DFLAGS | CLK_DIVIDER_READ_ONLY, RV1108_CLKGATE_CON(0), 4, GFLAGS),
H A Dclk-rk3228.c216 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(4), 1, GFLAGS),
218 DFLAGS | CLK_DIVIDER_READ_ONLY, RK2928_CLKGATE_CON(4), 0, GFLAGS),
H A Dclk-rk3308.c256 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3308_CLKGATE_CON(0), 2, GFLAGS),
258 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3308_CLKGATE_CON(0), 1, GFLAGS),
H A Dclk-px30.c230 DFLAGS | CLK_DIVIDER_READ_ONLY, PX30_CLKGATE_CON(0), 2, GFLAGS),
232 DFLAGS | CLK_DIVIDER_READ_ONLY, PX30_CLKGATE_CON(0), 1, GFLAGS),
H A Dclk.c97 div_ops = (div_flags & CLK_DIVIDER_READ_ONLY) ? &clk_divider_ro_ops : &clk_divider_ops; in rockchip_clk_register_branch()
/device/soc/rockchip/rk3566/vendor/drivers/clk/
H A Dclk-rk3568.c431 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(0), 5, GFLAGS),
436 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(0), 8, GFLAGS),
438 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(0), 9, GFLAGS),
440 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(0), 10, GFLAGS),
442 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(0), 11, GFLAGS),
444 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(0), 14, GFLAGS),
446 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(0), 15, GFLAGS),
448 DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(1), 0, GFLAGS),
460 MFLAGS | CLK_MUX_READ_ONLY, 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY, RK3568_CLKGATE_CON(2), 0, GFLAGS),
/device/soc/rockchip/rk3588/kernel/drivers/clk/rockchip/
H A Dclk-rk3588.c817 RK3588_DSU_CLKSEL_CON(3), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
820 RK3588_DSU_CLKSEL_CON(3), 5, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
823 RK3588_DSU_CLKSEL_CON(1), 11, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
826 RK3588_DSU_CLKSEL_CON(1), 1, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
829 RK3588_DSU_CLKSEL_CON(1), 6, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
832 RK3588_DSU_CLKSEL_CON(2), 0, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
835 RK3588_DSU_CLKSEL_CON(2), 5, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
838 RK3588_DSU_CLKSEL_CON(2), 10, 5, DFLAGS | CLK_DIVIDER_READ_ONLY,
/device/soc/rockchip/common/vendor/drivers/clk/
H A Dclk-rk1808.c257 DFLAGS | CLK_DIVIDER_READ_ONLY, RK1808_CLKGATE_CON(0), 3, GFLAGS),
259 DFLAGS | CLK_DIVIDER_READ_ONLY, RK1808_CLKGATE_CON(0), 2, GFLAGS),
/device/soc/rockchip/common/sdk_linux/include/linux/
H A Dclk-provider.h553 * CLK_DIVIDER_READ_ONLY - The divider settings are preconfigured and should
581 #define CLK_DIVIDER_READ_ONLY BIT(5) macro

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