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/arkcompiler/runtime_core/bytecode_optimizer/
H A Dbytecode_encoder.h30 static bool CanEncodeImmHelper(int64_t imm, uint32_t size, int64_t min, int64_t max) in CanEncodeImmHelper() argument
37 return imm >= min && imm <= max; in CanEncodeImmHelper()
40 bool CanEncodeImmAddSubCmp(int64_t imm, uint32_t size, [[maybe_unused]] bool signed_compare) override
42 return CanEncodeImmHelper(imm, size, INT8_MIN, INT8_MAX);
45 bool CanEncodeImmMulDivMod(uint64_t imm, uint32_t size) override
47 return CanEncodeImmAddSubCmp(imm, size, false);
50 bool CanEncodeImmLogical(uint64_t imm, uint32_t size) override
52 return CanEncodeImmHelper(imm, size, INT32_MIN, INT32_MAX);
/arkcompiler/runtime_core/static_core/bytecode_optimizer/
H A Dbytecode_encoder.h30 static bool CanEncodeImmHelper(int64_t imm, uint32_t size, int64_t min, int64_t max) in CanEncodeImmHelper() argument
37 return imm >= min && imm <= max; in CanEncodeImmHelper()
40 bool CanEncodeImmAddSubCmp(int64_t imm, uint32_t size, [[maybe_unused]] bool signedCompare) override
42 return CanEncodeImmHelper(imm, size, INT8_MIN, INT8_MAX);
45 bool CanEncodeImmMulDivMod(uint64_t imm, uint32_t size) override
47 return CanEncodeImmAddSubCmp(imm, size, false);
50 bool CanEncodeImmLogical(uint64_t imm, uint32_t size) override
52 return CanEncodeImmHelper(imm, size, INT32_MIN, INT32_MAX);
H A Dcommon.cpp102 int32_t imm = binop->GetImm() & BITMASK; in CanConvertToIncI() local
105 imm = -imm; in CanConvertToIncI()
109 return imm >= min && imm <= max; in CanConvertToIncI()
H A Dbytecode_optimizer_isapi.rb316 def imm method
430 [case_true('inci', r(0), imm),
432 plain("addiv", dst_r, r(0), imm),
433 plain("addi", imm)))])]
440 [case_true('inci', r(0), "-(#{imm})"),
442 plain("subiv", dst_r, r(0), imm),
443 plain("subi", imm)))])]
560 [case_true("#{op.downcase}v", dst_r, r(0), imm),
561 case_false("#{op.downcase}", imm)])]
/arkcompiler/ets_runtime/ecmascript/compiler/assembler/aarch64/
H A Dassembler_aarch64.cpp28 LogicalImmediate LogicalImmediate::Create(uint64_t imm, int width) in Create() argument
30 if ((imm == 0ULL) || (imm == ~0ULL) || in Create()
31 ((width != RegXSize) && (((imm >> width) != 0) || (imm == (~0ULL >> (RegXSize - width)))))) { in Create()
41 if ((imm & mask) != ((imm >> size) & mask)) { in Create()
51 imm &= mask; in Create()
53 if (IsShiftedMask_64(imm)) { in Create()
54 i = CountTrailingZeros64(imm); in Create()
109 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); Ldp() local
143 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); Stp() local
176 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); Ldp() local
222 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); Stp() local
282 uint64_t imm = GetImmOfLdr(operand, scale, regX); Ldr() local
325 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); Str() local
362 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); Ldur() local
374 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); Stur() local
381 Mov(const Register &rd, const Immediate &imm) Mov() argument
491 UpdateImm(uint64_t imm, unsigned idx, bool clear) UpdateImm() argument
503 TrySequenceOfOnes(const Register &rd, uint64_t imm) TrySequenceOfOnes() argument
570 TryReplicateHWords(const Register &rd, uint64_t imm) TryReplicateHWords() argument
620 EmitMovInstruct(const Register &rd, uint64_t imm, unsigned int allOneHWords, unsigned int allZeroHWords) EmitMovInstruct() argument
658 Movz(const Register &rd, uint64_t imm, int shift) Movz() argument
663 Movk(const Register &rd, uint64_t imm, int shift) Movk() argument
668 Movn(const Register &rd, uint64_t imm, int shift) Movn() argument
673 MovWide(uint32_t op, const Register &rd, uint64_t imm, int shift) MovWide() argument
682 Orr(const Register &rd, const Register &rn, const LogicalImmediate &imm) Orr() argument
687 And(const Register &rd, const Register &rn, const LogicalImmediate &imm) And() argument
692 Ands(const Register &rd, const Register &rn, const LogicalImmediate &imm) Ands() argument
715 BitWiseOpImm(BitwiseOpCode op, const Register &rd, const Register &rn, uint64_t imm) BitWiseOpImm() argument
780 int64_t imm = static_cast<int64_t>(operand.ImmediateValue()); Add() local
811 int64_t imm = static_cast<int64_t>(operand.ImmediateValue()); Sub() local
839 IsAddSubImm(uint64_t imm) IsAddSubImm() argument
852 AddSubImm(AddSubOpCode op, const Register &rd, const Register &rn, bool setFlags, uint64_t imm) AddSubImm() argument
913 B(int32_t imm) B() argument
933 Bl(int32_t imm) Bl() argument
954 B(Condition cond, int32_t imm) B() argument
976 Cbz(const Register &rt, int32_t imm) Cbz() argument
982 Cbnz(const Register &rt, int32_t imm) Cbnz() argument
996 Tbz(const Register &rt, int32_t bitPos, int32_t imm) Tbz() argument
1013 Tbnz(const Register &rt, int32_t bitPos, int32_t imm) Tbnz() argument
1027 Tst(const Register &rn, const LogicalImmediate &imm) Tst() argument
1029 Ands(Register(Zero, rn.GetType()), rn, imm); Tst() local
1141 Brk(const Immediate &imm) Brk() argument
1152 uint64_t imm = static_cast<uint64_t>(operand.GetImmediate().Value()); GetImmOfLdr() local
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H A Dassembler_aarch64.h132 static LogicalImmediate Create(uint64_t imm, int width);
159 Operand(Immediate imm) in Operand() argument
161 shiftAmount_(0), immediate_(imm) in Operand()
310 void Mov(const Register &rd, const Immediate &imm);
312 void Movz(const Register &rd, uint64_t imm, int shift);
313 void Movk(const Register &rd, uint64_t imm, int shift);
314 void Movn(const Register &rd, uint64_t imm, int shift);
315 void Orr(const Register &rd, const Register &rn, const LogicalImmediate &imm);
319 void And(const Register &rd, const Register &rn, const LogicalImmediate &imm);
320 void Ands(const Register &rd, const Register &rn, const LogicalImmediate &imm);
387 LoadAndStorePairImm(uint32_t imm) LoadAndStorePairImm() argument
392 LoadAndStoreImm(uint32_t imm, bool isSigned) LoadAndStoreImm() argument
401 BranchImm19(uint32_t imm) BranchImm19() argument
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/arkcompiler/runtime_core/static_core/compiler/tests/
H A Dvixl_exec_module.h119 void SetParameter(uint32_t idx, T imm) in SetParameter() argument
125 params_[idx] = {imm, TYPE}; in SetParameter()
129 void SetParameters(Ts... imm) in SetParameters() argument
133 ((params_[idx++] = {imm, GetType<Ts>()}), ...); in SetParameters()
193 for (auto [imm, type] : params_) { in WriteParameters()
196 simulator_.WriteXRegister(currRegNum++, std::get<bool>(imm)); in WriteParameters()
198 simulator_.WriteXRegister(currRegNum++, std::get<int8_t>(imm)); in WriteParameters()
200 simulator_.WriteXRegister(currRegNum++, std::get<uint8_t>(imm)); in WriteParameters()
202 simulator_.WriteXRegister(currRegNum++, std::get<int16_t>(imm)); in WriteParameters()
204 simulator_.WriteXRegister(currRegNum++, std::get<uint16_t>(imm)); in WriteParameters()
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/arkcompiler/runtime_core/compiler/tests/
H A Dvixl_exec_module.h119 void SetParameter(uint32_t idx, T imm) in SetParameter() argument
125 params_[idx] = {imm, type}; in SetParameter()
183 for (auto [imm, type] : params_) { in WriteParameters()
185 simulator.WriteXRegister(curr_reg_num++, std::get<bool>(imm)); in WriteParameters()
187 simulator.WriteXRegister(curr_reg_num++, std::get<int8_t>(imm)); in WriteParameters()
189 simulator.WriteXRegister(curr_reg_num++, std::get<uint8_t>(imm)); in WriteParameters()
191 simulator.WriteXRegister(curr_reg_num++, std::get<int16_t>(imm)); in WriteParameters()
193 simulator.WriteXRegister(curr_reg_num++, std::get<uint16_t>(imm)); in WriteParameters()
195 simulator.WriteXRegister(curr_reg_num++, std::get<int32_t>(imm)); in WriteParameters()
197 simulator.WriteXRegister(curr_reg_num++, std::get<uint32_t>(imm)); in WriteParameters()
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/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/
H A Dadjust_arefs.cpp184 Inst *AdjustRefs::InsertPointerArithmetic(Inst *input, uint64_t imm, Inst *insertBefore, uint32_t pc, bool isAdd) in InsertPointerArithmetic() argument
187 if (!GetGraph()->GetEncoder()->CanEncodeImmAddSubCmp(imm, size, false)) { in InsertPointerArithmetic()
192 newInst = GetGraph()->CreateInstAddI(DataType::POINTER, pc, input, imm); in InsertPointerArithmetic()
194 newInst = GetGraph()->CreateInstSubI(DataType::POINTER, pc, input, imm); in InsertPointerArithmetic()
235 uint64_t imm; in ProcessIndex() local
238 imm = index->CastToAddI()->GetImm(); in ProcessIndex()
241 imm = index->CastToSubI()->GetImm(); in ProcessIndex()
251 if (off > (imm << scale)) { in ProcessIndex()
252 uint64_t newOff = off - (imm << scale); in ProcessIndex()
254 } else if (off < (imm << scal in ProcessIndex()
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/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/
H A Dspill_fill_encoder.cpp164 auto imm = constInst->GetFloatValue(); in EncodeImmWithCorrectType() local
165 encoder_->EncodeSti(imm, dstMem); in EncodeImmWithCorrectType()
169 auto imm = constInst->GetDoubleValue(); in EncodeImmWithCorrectType() local
170 encoder_->EncodeSti(imm, dstMem); in EncodeImmWithCorrectType()
174 auto imm = constInst->GetRawValue(); in EncodeImmWithCorrectType() local
176 encoder_->EncodeSti(imm, storeSize, dstMem); in EncodeImmWithCorrectType()
187 if (sf.GetDst().IsAnyRegister()) { // imm -> register in EncodeImmToX()
193 Imm imm; in EncodeImmToX() local
197 imm = Imm(constInst->GetFloatValue()); in EncodeImmToX()
200 imm in EncodeImmToX()
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H A Dencode.h189 virtual void EncodeDiv(Reg dst, Reg src0, Imm imm, bool isSigned);
190 virtual void EncodeMod(Reg dst, Reg src0, Imm imm, bool isSigned);
251 Imm imm; member
301 virtual bool CanEncodeImmAddSubCmp(int64_t imm, uint32_t size, bool signedCompare);
302 virtual bool CanEncodeImmMulDivMod(uint64_t imm, uint32_t size);
303 virtual bool CanEncodeImmLogical(uint64_t imm, uint32_t size);
304 virtual bool CanOptimizeImmDivMod(uint64_t imm, bool isSigned) const;
305 virtual bool CanEncodeScale(uint64_t imm, uint32_t size);
403 virtual void EncodeJump(LabelHolder::LabelId id, Reg reg, Imm imm, Condition c);
407 virtual void EncodeJumpTest(LabelHolder::LabelId id, Reg reg, Imm imm, Conditio
460 CanOptimizeImmDivModCommon(uint64_t imm, bool isSigned) CanOptimizeImmDivModCommon() argument
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/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/amd64/
H A Dencode.cpp189 static asmjit::Imm ArchImm(Imm imm) in ArchImm() argument
191 ASSERT(imm.GetType() == INT64_TYPE); in ArchImm()
192 return asmjit::imm(imm.GetAsInt()); in ArchImm()
195 static uint64_t ImmToUnsignedInt(Imm imm) in ImmToUnsignedInt() argument
197 ASSERT(imm.GetType() == INT64_TYPE); in ImmToUnsignedInt()
198 return uint64_t(imm.GetAsInt()); in ImmToUnsignedInt()
201 static bool ImmFitsSize(int64_t imm, uint8_t size) in ImmFitsSize() argument
213 return imm >= min && imm < in ImmFitsSize()
464 EncodeJump(LabelHolder::LabelId id, Reg src, Imm imm, Condition cc) EncodeJump() argument
505 EncodeJumpTest(LabelHolder::LabelId id, Reg src, Imm imm, Condition cc) EncodeJumpTest() argument
678 EncodeMul([[maybe_unused]] Reg dst, [[maybe_unused]] Reg src, [[maybe_unused]] Imm imm) EncodeMul() argument
1485 EncodeSignedDiv(Reg dst, Reg src0, Imm imm) EncodeSignedDiv() argument
1529 EncodeUnsignedDiv(Reg dst, Reg src0, Imm imm) EncodeUnsignedDiv() argument
1573 EncodeDiv(Reg dst, Reg src0, Imm imm, bool isSigned) EncodeDiv() argument
1584 EncodeMod(Reg dst, Reg src0, Imm imm, bool isSigned) EncodeMod() argument
1863 EncodeAdd(Reg dst, Reg src, Imm imm) EncodeAdd() argument
1886 EncodeSub(Reg dst, Reg src, Imm imm) EncodeSub() argument
1909 EncodeShl(Reg dst, Reg src, Imm imm) EncodeShl() argument
1916 EncodeShr(Reg dst, Reg src, Imm imm) EncodeShr() argument
1924 EncodeAShr(Reg dst, Reg src, Imm imm) EncodeAShr() argument
1931 EncodeAnd(Reg dst, Reg src, Imm imm) EncodeAnd() argument
1970 EncodeOr(Reg dst, Reg src, Imm imm) EncodeOr() argument
1989 EncodeXor(Reg dst, Reg src, Imm imm) EncodeXor() argument
2448 CanEncodeImmAddSubCmp(int64_t imm, uint32_t size, [[maybe_unused]] bool signedCompare) CanEncodeImmAddSubCmp() argument
2683 CanEncodeScale(uint64_t imm, [[maybe_unused]] uint32_t size) CanEncodeScale() argument
2688 CanEncodeImmLogical(uint64_t imm, uint32_t size) CanEncodeImmLogical() argument
2704 CanOptimizeImmDivMod(uint64_t imm, bool isSigned) const CanOptimizeImmDivMod() argument
3249 CopyImmToXmm(Reg xmm, T imm) CopyImmToXmm() argument
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/arkcompiler/ets_frontend/merge_abc/src/
H A DassemblyInsProto.cpp28 for (const auto &imm : insn.imms) { in Serialize()
30 switch (static_cast<protoPanda::Ins_IType::TypeCase>(imm.index() + 1)) { // 1: enum TypeCase start from 1 in Serialize()
32 protoImm->set_valueint(std::get<int64_t>(imm)); in Serialize()
35 protoImm->set_valuedouble(std::get<double>(imm)); in Serialize()
/arkcompiler/runtime_core/static_core/runtime/templates/
H A Dbridge_helpers_aarch64.rb14 def cmp_opcode(imm)
15 if imm <= 4095
16 return "cmp w5, ##{imm}"
18 # We need to save imm to temporary register before cmp,
20 return "mov w13, ##{imm}
H A Dbridge_helpers_arm.rb14 def cmp_opcode(imm)
15 if imm <= 255
16 return "cmp r6, ##{imm}"
18 # We need to save imm to temporary register before cmp,
20 return "mov r9, ##{imm}
H A Dbridge_helpers_x86.rb14 def cmp_opcode(imm)
15 return "cmpl $#{imm}, %ebx"
H A Dbridge_helpers_amd64.rb14 def cmp_opcode(imm)
15 return "cmpl $#{imm}, %ecx"
H A Dbridge_helpers_armhf.rb14 def cmp_opcode(imm)
15 return "cmp r10, ##{imm}"
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/
H A Dtarget.h97 static inline vixl::aarch32::Operand VixlImm(Imm imm) in VixlImm() argument
100 return vixl::aarch32::Operand(static_cast<int32_t>(imm.GetRawValue())); in VixlImm()
104 static inline vixl::aarch32::Operand VixlImmU(Imm imm) in VixlImmU() argument
108 auto data = static_cast<int32_t>(imm.GetRawValue() >> WORD_SIZE); in VixlImmU()
112 static inline vixl::aarch32::Operand VixlImm(const int32_t imm) in VixlImm() argument
114 return vixl::aarch32::Operand(imm); in VixlImm()
117 static inline vixl::aarch32::NeonImmediate VixlNeonImm(const float imm) in VixlNeonImm() argument
119 return vixl::aarch32::NeonImmediate(imm); in VixlNeonImm()
122 static inline vixl::aarch32::NeonImmediate VixlNeonImm(const double imm) in VixlNeonImm() argument
124 return vixl::aarch32::NeonImmediate(imm); in VixlNeonImm()
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/arkcompiler/runtime_core/assembler/
H A Dassembly-ins.cpp43 for (const auto &imm : this->imms) { in ImmsToString()
50 auto *number = std::get_if<double>(&imm); in ImmsToString()
54 translator << " 0x" << std::hex << std::get<int64_t>(imm); in ImmsToString()
/arkcompiler/runtime_core/static_core/assembler/
H A Dassembly-ins.cpp43 for (const auto &imm : this->imms) { in ImmsToString()
50 auto *number = std::get_if<double>(&imm); in ImmsToString()
54 translator << " 0x" << std::hex << std::get<int64_t>(imm); in ImmsToString()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch64/
H A Dtarget.h107 static inline vixl::aarch64::Operand VixlImm(const int64_t imm) in VixlImm() argument
109 return vixl::aarch64::Operand(imm); in VixlImm()
112 static inline vixl::aarch64::Operand VixlImm(Imm imm) in VixlImm() argument
114 return vixl::aarch64::Operand(imm.GetAsInt()); in VixlImm()
245 void EncodeDiv(Reg dst, Reg src0, Imm imm, bool isSigned) override;
246 void EncodeSignedDiv(Reg dst, Reg src0, Imm imm);
247 void EncodeUnsignedDiv(Reg dst, Reg src0, Imm imm);
248 void EncodeMod(Reg dst, Reg src0, Imm imm, bool isSigned) override;
329 bool CanEncodeImmAddSubCmp(int64_t imm, uint32_t size, bool signedCompare) override;
330 bool CanEncodeImmLogical(uint64_t imm, uint32_
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/arkcompiler/runtime_core/compiler/optimizer/ir/
H A Dir_constructor.h382 IrConstructor &Imm(uint64_t imm) in Imm() argument
397 static_cast<BinaryImmOperation *>(inst)->SetImm(imm); in Imm()
400 inst->CastToBoundsCheckI()->SetImm(imm); in Imm()
403 inst->CastToLoadArrayI()->SetImm(imm); in Imm()
406 inst->CastToStoreArrayI()->SetImm(imm); in Imm()
409 inst->CastToLoadI()->SetImm(imm); in Imm()
412 inst->CastToStoreI()->SetImm(imm); in Imm()
415 inst->CastToReturnI()->SetImm(imm); in Imm()
418 inst->CastToIfImm()->SetImm(imm); in Imm()
421 inst->CastToSelectImm()->SetImm(imm); in Imm()
441 Shift(ShiftType shift_type, uint64_t imm) Shift() argument
607 AddImm(uint32_t imm) AddImm() argument
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/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/x86_64/
H A Delf_assembler.cpp153 uint8 imm = 0; in EmitJmpTableElem() local
154 Encodeb(imm, kLabelSize); in EmitJmpTableElem()
378 uint8 imm = 0; in OpDisp() local
379 Encodeb(imm, offsetSize); in OpDisp()
444 uint32 imm = static_cast<uint32>(immOpnd.first); /* When isSymbol is true, this is index. */ in OpImmAndReg() local
445 uint8 immBit = Is8Bits(imm) ? k8Bits : (Is16Bits(imm) ? k16Bits : k32Bits); in OpImmAndReg()
451 immBit = k32Bits; /* if 32/64bit mode, imm val can not use 16-bit. */ in OpImmAndReg()
470 imm = 0; in OpImmAndReg()
471 Encodeb(imm, immBi in OpImmAndReg()
1301 uint64 imm = static_cast<uint64>(immOpnd.first); /* When isSymbol is true, this is index. */ Mov() local
1347 uint32 imm = static_cast<uint32>(immOpnd.first); /* When isSymbol is true, this is index. */ Mov() local
1405 uint64 imm = static_cast<uint64>(immOpnd.first); /* When isSymbol is true, this is index. */ Movabs() local
1429 uint8 imm = 0; Movabs() local
2125 uint8 imm = 0; Call() local
2311 Cmpsd(Reg srcReg, Reg destReg, uint8 imm) Cmpsd() argument
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/arkcompiler/runtime_core/static_core/compiler/tests/codegen/
H A Dcodegen_test.h67 void CheckStoreArrayPair(bool imm);
70 void CheckLoadArrayPair(bool imm);

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