/third_party/node/deps/v8/src/codegen/shared-ia32-x64/ |
H A D | macro-assembler-shared-ia32-x64.h | 57 void Pinsrb(XMMRegister dst, XMMRegister src1, Op src2, uint8_t imm8, in Pinsrb() argument 64 void Pinsrw(XMMRegister dst, XMMRegister src1, Op src2, uint8_t imm8, in Pinsrw() argument 563 void Pextrd(Register dst, XMMRegister src, uint8_t imm8) { in Pextrd() argument 495 PinsrHelper(Assembler* assm, AvxFn<Op> avx, NoAvxFn<Op> noavx, XMMRegister dst, XMMRegister src1, Op src2, uint8_t imm8, uint32_t* load_pc_offset = nullptr, base::Optional<CpuFeature> feature = base::nullopt) PinsrHelper() argument 582 Pinsrd(XMMRegister dst, XMMRegister src1, Op src2, uint8_t imm8, uint32_t* load_pc_offset = nullptr) Pinsrd() argument 597 Pinsrd(XMMRegister dst, Op src, uint8_t imm8, uint32_t* load_pc_offset = nullptr) Pinsrd() argument [all...] |
H A D | macro-assembler-shared-ia32-x64.cc | 119 Shufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t imm8) Shufps() argument
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/third_party/vixl/src/aarch32/ |
H A D | instructions-aarch32.cc | 629 uint32_t imm8 = imm >> (24 - shift); in ImmediateT32() local 686 uint32_t imm8 = (imm << rot) | (imm >> (32 - rot)); in ImmediateA32() local
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H A D | macro-assembler-aarch32.cc | 1282 uint8_t imm8 = imm & 0xff; in IsI8BitPattern() local
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H A D | operands-aarch32.h | 540 static float Decode(uint32_t imm8, const FloatType<float>&) { in Decode() argument 544 static double Decode(uint32_t imm8, const FloatType<double>&) { in Decode() argument
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/third_party/node/deps/v8/src/codegen/ia32/ |
H A D | macro-assembler-ia32.h | 308 void PinsrdPreSse41(XMMRegister dst, Register src, uint8_t imm8, in PinsrdPreSse41() argument
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H A D | assembler-ia32.h | 494 void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } in mov_b() local 586 void cmpb(Register reg, Immediate imm8) { in cmpb() argument 588 cmpb(Operand(reg), imm8); in cmpb() local 654 void rol(Register dst, uint8_t imm8) { rol(Operand(dst), imm8); } in rol() local 659 void ror(Register dst, uint8_t imm8) { ror(Operand(dst), imm8); } ror() local 664 void sar(Register dst, uint8_t imm8) { sar(Operand(dst), imm8); } sar() local 672 void shl(Register dst, uint8_t imm8) { shl(Operand(dst), imm8); } shl() local 679 void shr(Register dst, uint8_t imm8) { shr(Operand(dst), imm8); } shr() local 1162 vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vshufps() argument 1166 vshufpd(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vshufpd() argument 1423 rorx(Register dst, Register src, byte imm8) rorx() argument [all...] |
H A D | macro-assembler-ia32.cc | 1616 void TurboAssembler::PinsrdPreSse41(XMMRegister dst, Operand src, uint8_t imm8, in CallRecordWriteStub() argument 1600 PextrdPreSse41(Register dst, XMMRegister src, uint8_t imm8) CallRecordWriteStub() argument
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H A D | assembler-ia32.cc | 903 void Assembler::cmpb(Operand op, Immediate imm8) { in cmpb() argument 1137 void Assembler::rcl(Register dst, uint8_t imm8) { in rcl() argument 1150 void Assembler::rcr(Register dst, uint8_t imm8) { in rcr() argument 1163 rol(Operand dst, uint8_t imm8) rol() argument 1182 ror(Operand dst, uint8_t imm8) ror() argument 1201 sar(Operand dst, uint8_t imm8) sar() argument 1242 shl(Operand dst, uint8_t imm8) shl() argument 1261 shr(Operand dst, uint8_t imm8) shr() argument 1366 test_b(Register reg, Immediate imm8) test_b() argument 1384 test_b(Operand op, Immediate imm8) test_b() argument 2385 shufps(XMMRegister dst, XMMRegister src, byte imm8) shufps() argument 2394 shufpd(XMMRegister dst, XMMRegister src, byte imm8) shufpd() argument 2552 extractps(Operand dst, XMMRegister src, byte imm8) extractps() argument 2564 extractps(Register dst, XMMRegister src, byte imm8) extractps() argument 2877 vshufpd(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vshufpd() argument 2920 vshufps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vshufps() argument 2927 vpsllw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsllw() argument 2933 vpslld(XMMRegister dst, XMMRegister src, uint8_t imm8) vpslld() argument 2939 vpsllq(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsllq() argument 2945 vpsrlw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrlw() argument 2951 vpsrld(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrld() argument 2957 vpsrlq(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrlq() argument 2963 vpsraw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsraw() argument 2969 vpsrad(XMMRegister dst, XMMRegister src, uint8_t imm8) vpsrad() argument 3102 vextractps(Operand dst, XMMRegister src, byte imm8) vextractps() argument 3155 rorx(Register dst, Operand src, byte imm8) rorx() argument 3327 emit_arith_b(int op1, int op2, Register dst, int imm8) emit_arith_b() argument [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
H A D | X86Disassembler.cpp | 1394 uint8_t imm8; in readImmediate() local
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/third_party/vixl/src/aarch64/ |
H A D | instructions-aarch64.cc | 772 Float16 Instruction::Imm8ToFloat16(uint32_t imm8) { in Imm8ToFloat16() argument 785 float Instruction::Imm8ToFP32(uint32_t imm8) { in Imm8ToFP32() argument 805 double Instruction::Imm8ToFP64(uint32_t imm8) { in Imm8ToFP64() argument
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H A D | macro-assembler-sve-aarch64.cc | 75 int imm8; in TrySingleAddSub() local 368 int imm8; in Cpy() local 482 int imm8; in Dup() local 1095 int imm8; Sub() local [all...] |
/third_party/node/deps/v8/src/codegen/arm64/ |
H A D | macro-assembler-arm64.h | 492 void Bic(const VRegister& vd, const int imm8, const int left_shift = 0) { in Bic() argument 669 void Orr(const VRegister& vd, const int imm8, const int left_shift = 0) { in Orr() argument 1612 void Mvni(const VRegister& vd, const int imm8, Shift shift = LSL, in Mvni() argument
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H A D | instructions-arm64.h | 180 static float Imm8ToFP32(uint32_t imm8) { in Imm8ToFP32() argument 193 static double Imm8ToFP64(uint32_t imm8) { in Imm8ToFP64() argument
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H A D | assembler-arm64.cc | 3194 void Assembler::orr(const VRegister& vd, const int imm8, const int left_shift) { in orr() argument 3208 void Assembler::bic(const VRegister& vd, const int imm8, const int left_shift) { in bic() argument 3217 int imm8 = 0; in movi() local 3249 void Assembler::mvni(const VRegister& vd, const int imm8, Shift shift, in mvni() argument 3820 NEONModifiedImmShiftLsl(const VRegister& vd, const int imm8, const int left_shift, NEONModifiedImmediateOp op) NEONModifiedImmShiftLsl() argument 3851 NEONModifiedImmShiftMsl(const VRegister& vd, const int imm8, const int shift_amount, NEONModifiedImmediateOp op) NEONModifiedImmShiftMsl() argument [all...] |
/third_party/node/deps/v8/src/diagnostics/x64/ |
H A D | disasm-x64.cc | 832 int imm8 = -1; in ShiftInstruction() local
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/third_party/node/deps/v8/src/diagnostics/arm64/ |
H A D | disasm-arm64.cc | 4016 uint64_t imm8 = instr->ImmNEONabcdefgh(); in SubstituteImmediateField() local 4020 uint64_t imm8 = instr->ImmNEONabcdefgh(); in SubstituteImmediateField() local
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/third_party/node/deps/v8/src/diagnostics/ia32/ |
H A D | disasm-ia32.cc | 589 int imm8 = -1; in D1D3C1Instruction() local 1992 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local 2015 int8_t imm8 = static_cast<int8_t>(data[1]); in InstructionDecode() local 2275 int8_t imm8 = static_cast<int8_t>(data[1]); InstructionDecode() local 2324 int8_t imm8 = static_cast<int8_t>(data[1]); InstructionDecode() local 2427 int8_t imm8 = static_cast<int8_t>(data[1]); InstructionDecode() local 2435 int8_t imm8 = static_cast<int8_t>(data[1]); InstructionDecode() local 2443 int8_t imm8 = static_cast<int8_t>(data[1]); InstructionDecode() local [all...] |
/third_party/node/deps/v8/src/codegen/x64/ |
H A D | assembler-x64.h | 978 sse2_instr(XMMRegister reg, byte imm8, byte prefix, byte escape, byte opcode, int extension) sse2_instr() argument 1610 vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vshufps() argument 1613 vshufps(YMMRegister dst, YMMRegister src1, YMMRegister src2, byte imm8) vshufps() argument 1718 vinsertps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vinsertps() argument 1723 vinsertps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) vinsertps() argument 1727 vpextrq(Register dst, XMMRegister src, int8_t imm8) vpextrq() argument 1732 vpinsrb(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrb() argument 1737 vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrb() argument 1741 vpinsrw(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrw() argument 1746 vpinsrw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrw() argument 1750 vpinsrd(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrd() argument 1755 vpinsrd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrd() argument 1759 vpinsrq(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) vpinsrq() argument 1764 vpinsrq(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpinsrq() argument 1769 vpshufd(XMMRegister dst, XMMRegister src, uint8_t imm8) vpshufd() argument 1773 vpshufd(YMMRegister dst, YMMRegister src, uint8_t imm8) vpshufd() argument 1777 vpshufd(XMMRegister dst, Operand src, uint8_t imm8) vpshufd() argument 1781 vpshufd(YMMRegister dst, Operand src, uint8_t imm8) vpshufd() argument 1785 vpshuflw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpshuflw() argument 1789 vpshuflw(YMMRegister dst, YMMRegister src, uint8_t imm8) vpshuflw() argument 1793 vpshuflw(XMMRegister dst, Operand src, uint8_t imm8) vpshuflw() argument 1797 vpshuflw(YMMRegister dst, Operand src, uint8_t imm8) vpshuflw() argument 1801 vpshufhw(XMMRegister dst, XMMRegister src, uint8_t imm8) vpshufhw() argument 1805 vpshufhw(YMMRegister dst, YMMRegister src, uint8_t imm8) vpshufhw() argument 1809 vpshufhw(XMMRegister dst, Operand src, uint8_t imm8) vpshufhw() argument 1813 vpshufhw(YMMRegister dst, Operand src, uint8_t imm8) vpshufhw() argument 1837 vpalignr(XMMRegister dst, XMMRegister src1, XMMRegister src2, uint8_t imm8) vpalignr() argument 1842 vpalignr(YMMRegister dst, YMMRegister src1, YMMRegister src2, uint8_t imm8) vpalignr() argument 1847 vpalignr(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) vpalignr() argument 1851 vpalignr(YMMRegister dst, YMMRegister src1, Operand src2, uint8_t imm8) vpalignr() argument [all...] |
H A D | assembler-x64.cc | 883 void Assembler::btsq(Register dst, Immediate imm8) { in btsq() argument 892 void Assembler::btrq(Register dst, Immediate imm8) { in btrq() argument 1132 void Assembler::cmpb_al(Immediate imm8) { in cmpb_al() argument 2843 void Assembler::pinsrw(XMMRegister dst, Register src, uint8_t imm8) { in pinsrw() argument 2853 pinsrw(XMMRegister dst, Operand src, uint8_t imm8) pinsrw() argument 2863 pextrq(Register dst, XMMRegister src, int8_t imm8) pextrq() argument 2875 pinsrq(XMMRegister dst, Register src, uint8_t imm8) pinsrq() argument 2887 pinsrq(XMMRegister dst, Operand src, uint8_t imm8) pinsrq() argument 2899 pinsrd(XMMRegister dst, Register src, uint8_t imm8) pinsrd() argument 2903 pinsrd(XMMRegister dst, Operand src, uint8_t imm8) pinsrd() argument 2908 pinsrb(XMMRegister dst, Register src, uint8_t imm8) pinsrb() argument 2912 pinsrb(XMMRegister dst, Operand src, uint8_t imm8) pinsrb() argument 2917 insertps(XMMRegister dst, XMMRegister src, byte imm8) insertps() argument 2923 insertps(XMMRegister dst, Operand src, byte imm8) insertps() argument 2985 shufps(XMMRegister dst, XMMRegister src, byte imm8) shufps() argument 3790 vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) vps() argument 3800 vps(byte op, YMMRegister dst, YMMRegister src1, YMMRegister src2, byte imm8) vps() argument 4062 rorxq(Register dst, Register src, byte imm8) rorxq() argument 4073 rorxq(Register dst, Operand src, byte imm8) rorxq() argument 4084 rorxl(Register dst, Register src, byte imm8) rorxl() argument 4095 rorxl(Register dst, Operand src, byte imm8) rorxl() argument 4205 sse4_instr(XMMRegister dst, Register src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument 4244 sse4_instr(Register dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument 4259 sse4_instr(Operand dst, XMMRegister src, byte prefix, byte escape1, byte escape2, byte opcode, int8_t imm8) sse4_instr() argument [all...] |
H A D | macro-assembler-x64.cc | 892 void TurboAssembler::Pextrq(Register dst, XMMRegister src, int8_t imm8) { in CallRecordWriteStub() argument 2094 void TurboAssembler::PinsrdPreSse41(XMMRegister dst, Register src, uint8_t imm8, in CallRecordWriteStub() argument 2068 PextrdPreSse41(Register dst, XMMRegister src, uint8_t imm8) CallRecordWriteStub() argument 2081 PinsrdPreSse41Helper(TurboAssembler* tasm, XMMRegister dst, Op src, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument 2099 PinsrdPreSse41(XMMRegister dst, Operand src, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument 2104 Pinsrq(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument 2110 Pinsrq(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8, uint32_t* load_pc_offset) CallRecordWriteStub() argument [all...] |
/third_party/node/deps/v8/src/execution/ppc/ |
H A D | simulator-ppc.cc | 4270 int8_t imm8 = instr->Bits(18, 11); in ExecuteGeneric() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 2310 unsigned imm8 = fieldFromInstruction(Insn, 0, 8); in DecodeHINTInstruction() local
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/third_party/node/deps/v8/src/codegen/mips64/ |
H A D | assembler-mips64.cc | 1189 void Assembler::GenInstrMsaI8(SecondaryField operation, uint32_t imm8, in GenInstrMsaI8() argument
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/third_party/node/deps/v8/src/codegen/mips/ |
H A D | assembler-mips.cc | 1260 void Assembler::GenInstrMsaI8(SecondaryField operation, uint32_t imm8, in GenInstrMsaI8() argument
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