Lines Matching defs:imm8
696 void instruction##l(Register dst, Immediate imm8) { \
697 shift(dst, imm8, subcode, kInt32Size); \
700 void instruction##q(Register dst, Immediate imm8) { \
701 shift(dst, imm8, subcode, kInt64Size); \
704 void instruction##l(Operand dst, Immediate imm8) { \
705 shift(dst, imm8, subcode, kInt32Size); \
708 void instruction##q(Operand dst, Immediate imm8) { \
709 shift(dst, imm8, subcode, kInt64Size); \
752 void btsq(Register dst, Immediate imm8);
753 void btrq(Register dst, Immediate imm8);
925 void shufps(XMMRegister dst, XMMRegister src, byte imm8);
978 void sse2_instr(XMMRegister reg, byte imm8, byte prefix, byte escape,
982 emit(imm8);
986 void instruction(XMMRegister reg, byte imm8) { \
987 sse2_instr(reg, imm8, 0x##prefix, 0x##escape, 0x##opcode, 0x##extension); \
1076 byte escape2, byte opcode, int8_t imm8);
1078 byte escape2, byte opcode, int8_t imm8);
1080 byte escape2, byte opcode, int8_t imm8);
1103 void instruction(Register dst, XMMRegister src, uint8_t imm8) { \
1105 imm8); \
1107 void instruction(Operand dst, XMMRegister src, uint8_t imm8) { \
1109 imm8); \
1223 void v##instruction(Register dst, XMMRegister src, uint8_t imm8) { \
1226 emit(imm8); \
1228 void v##instruction(Operand dst, XMMRegister src, uint8_t imm8) { \
1230 emit(imm8); \
1299 void pinsrw(XMMRegister dst, Register src, uint8_t imm8);
1300 void pinsrw(XMMRegister dst, Operand src, uint8_t imm8);
1303 void insertps(XMMRegister dst, XMMRegister src, byte imm8);
1304 void insertps(XMMRegister dst, Operand src, byte imm8);
1305 void pextrq(Register dst, XMMRegister src, int8_t imm8);
1306 void pinsrb(XMMRegister dst, Register src, uint8_t imm8);
1307 void pinsrb(XMMRegister dst, Operand src, uint8_t imm8);
1308 void pinsrd(XMMRegister dst, Register src, uint8_t imm8);
1309 void pinsrd(XMMRegister dst, Operand src, uint8_t imm8);
1310 void pinsrq(XMMRegister dst, Register src, uint8_t imm8);
1311 void pinsrq(XMMRegister dst, Operand src, uint8_t imm8);
1325 #define SSE_CMP_P(instr, imm8) \
1326 void instr##ps(XMMRegister dst, XMMRegister src) { cmpps(dst, src, imm8); } \
1327 void instr##ps(XMMRegister dst, Operand src) { cmpps(dst, src, imm8); } \
1328 void instr##pd(XMMRegister dst, XMMRegister src) { cmppd(dst, src, imm8); } \
1329 void instr##pd(XMMRegister dst, Operand src) { cmppd(dst, src, imm8); }
1474 void v##instr(XMMRegister dst, XMMRegister src, byte imm8) { \
1477 emit(imm8); \
1610 void vshufps(XMMRegister dst, XMMRegister src1, XMMRegister src2, byte imm8) {
1611 vps(0xC6, dst, src1, src2, imm8);
1613 void vshufps(YMMRegister dst, YMMRegister src1, YMMRegister src2, byte imm8) {
1614 vps(0xC6, dst, src1, src2, imm8);
1682 #define AVX_CMP_P(instr, imm8, SIMDRegister) \
1684 vcmpps(dst, src1, src2, imm8); \
1687 vcmpps(dst, src1, src2, imm8); \
1690 vcmppd(dst, src1, src2, imm8); \
1693 vcmppd(dst, src1, src2, imm8); \
1719 byte imm8) {
1721 emit(imm8);
1723 void vinsertps(XMMRegister dst, XMMRegister src1, Operand src2, byte imm8) {
1725 emit(imm8);
1727 void vpextrq(Register dst, XMMRegister src, int8_t imm8) {
1730 emit(imm8);
1732 void vpinsrb(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) {
1735 emit(imm8);
1737 void vpinsrb(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) {
1739 emit(imm8);
1741 void vpinsrw(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) {
1744 emit(imm8);
1746 void vpinsrw(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) {
1748 emit(imm8);
1750 void vpinsrd(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) {
1753 emit(imm8);
1755 void vpinsrd(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) {
1757 emit(imm8);
1759 void vpinsrq(XMMRegister dst, XMMRegister src1, Register src2, uint8_t imm8) {
1762 emit(imm8);
1764 void vpinsrq(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) {
1766 emit(imm8);
1769 void vpshufd(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1771 emit(imm8);
1773 void vpshufd(YMMRegister dst, YMMRegister src, uint8_t imm8) {
1775 emit(imm8);
1777 void vpshufd(XMMRegister dst, Operand src, uint8_t imm8) {
1779 emit(imm8);
1781 void vpshufd(YMMRegister dst, Operand src, uint8_t imm8) {
1783 emit(imm8);
1785 void vpshuflw(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1787 emit(imm8);
1789 void vpshuflw(YMMRegister dst, YMMRegister src, uint8_t imm8) {
1791 emit(imm8);
1793 void vpshuflw(XMMRegister dst, Operand src, uint8_t imm8) {
1795 emit(imm8);
1797 void vpshuflw(YMMRegister dst, Operand src, uint8_t imm8) {
1799 emit(imm8);
1801 void vpshufhw(XMMRegister dst, XMMRegister src, uint8_t imm8) {
1803 emit(imm8);
1805 void vpshufhw(YMMRegister dst, YMMRegister src, uint8_t imm8) {
1807 emit(imm8);
1809 void vpshufhw(XMMRegister dst, Operand src, uint8_t imm8) {
1811 emit(imm8);
1813 void vpshufhw(YMMRegister dst, Operand src, uint8_t imm8) {
1815 emit(imm8);
1838 uint8_t imm8) {
1840 emit(imm8);
1843 uint8_t imm8) {
1845 emit(imm8);
1847 void vpalignr(XMMRegister dst, XMMRegister src1, Operand src2, uint8_t imm8) {
1849 emit(imm8);
1851 void vpalignr(YMMRegister dst, YMMRegister src1, Operand src2, uint8_t imm8) {
1853 emit(imm8);
1861 byte imm8);
1863 byte imm8);
2015 void rorxq(Register dst, Register src, byte imm8);
2016 void rorxq(Register dst, Operand src, byte imm8);
2017 void rorxl(Register dst, Register src, byte imm8);
2018 void rorxl(Register dst, Operand src, byte imm8);