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Searched defs:imm12 (Results 1 - 6 of 6) sorted by relevance

/third_party/node/deps/v8/src/codegen/arm64/
H A Dassembler-arm64-inl.h986 Instr Assembler::ImmLSUnsigned(int imm12) { in ImmLSUnsigned() argument
/third_party/node/deps/v8/src/codegen/riscv64/
H A Dassembler-riscv64.h1119 jr(Register rs, int32_t imm12) jr() argument
1120 jalr(Register rs, int32_t imm12) jalr() argument
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H A Dassembler-riscv64.cc397 int32_t imm12 = instr >> 20; in target_at() local
457 int32_t imm12 = ((imm & 0x800) >> 4) | // bit 11 in SetBranchOffset() local
469 int32_t imm12 = offset << kImm12Shift; in SetLdOffset() local
484 int32_t imm12 = offset << kImm12Shift; in SetJalrOffset() local
746 int32_t imm12 = ((instr & 0x4) << 3) | ((instr & 0x38) >> 2) | CJumpOffset() local
761 int32_t imm12 = static_cast<int32_t>(instr_I & kImm12Mask) >> 20; BrachlongOffset() local
782 int32_t imm12 = static_cast<int32_t>(instr & kImm12Mask) >> 20; LdOffset() local
788 int32_t imm12 = static_cast<int32_t>(instr & kImm12Mask) >> 20; JalrOffset() local
919 GenInstrI(uint8_t funct3, Opcode opcode, Register rd, Register rs1, int16_t imm12) GenInstrI() argument
928 GenInstrI(uint8_t funct3, Opcode opcode, FPURegister rd, Register rs1, int16_t imm12) GenInstrI() argument
957 GenInstrS(uint8_t funct3, Opcode opcode, Register rs1, Register rs2, int16_t imm12) GenInstrS() argument
968 GenInstrS(uint8_t funct3, Opcode opcode, Register rs1, FPURegister rs2, int16_t imm12) GenInstrS() argument
1290 GenInstrLoad_ri(uint8_t funct3, Register rd, Register rs1, int16_t imm12) GenInstrLoad_ri() argument
1295 GenInstrStore_rri(uint8_t funct3, Register rs1, Register rs2, int16_t imm12) GenInstrStore_rri() argument
1300 GenInstrALU_ri(uint8_t funct3, Register rd, Register rs1, int16_t imm12) GenInstrALU_ri() argument
1340 GenInstrLoadFP_ri(uint8_t funct3, FPURegister rd, Register rs1, int16_t imm12) GenInstrLoadFP_ri() argument
1345 GenInstrStoreFP_rri(uint8_t funct3, Register rs1, FPURegister rs2, int16_t imm12) GenInstrStoreFP_rri() argument
1528 jalr(Register rd, Register rs1, int16_t imm12) jalr() argument
1561 lb(Register rd, Register rs1, int16_t imm12) lb() argument
1565 lh(Register rd, Register rs1, int16_t imm12) lh() argument
1569 lw(Register rd, Register rs1, int16_t imm12) lw() argument
1573 lbu(Register rd, Register rs1, int16_t imm12) lbu() argument
1577 lhu(Register rd, Register rs1, int16_t imm12) lhu() argument
1583 sb(Register source, Register base, int16_t imm12) sb() argument
1587 sh(Register source, Register base, int16_t imm12) sh() argument
1591 sw(Register source, Register base, int16_t imm12) sw() argument
1597 addi(Register rd, Register rs1, int16_t imm12) addi() argument
1601 slti(Register rd, Register rs1, int16_t imm12) slti() argument
1605 sltiu(Register rd, Register rs1, int16_t imm12) sltiu() argument
1609 xori(Register rd, Register rs1, int16_t imm12) xori() argument
1613 ori(Register rd, Register rs1, int16_t imm12) ori() argument
1617 andi(Register rd, Register rs1, int16_t imm12) andi() argument
1679 uint16_t imm12 = succ | (pred << 4) | (0b0000 << 8); fence() local
1684 uint16_t imm12 = (0b0011) | (0b0011 << 4) | (0b1000 << 8); fence_tso() local
1733 lwu(Register rd, Register rs1, int16_t imm12) lwu() argument
1737 ld(Register rd, Register rs1, int16_t imm12) ld() argument
1741 sd(Register source, Register base, int16_t imm12) sd() argument
1745 addiw(Register rd, Register rs1, int16_t imm12) addiw() argument
1951 flw(FPURegister rd, Register rs1, int16_t imm12) flw() argument
1955 fsw(FPURegister source, Register base, int16_t imm12) fsw() argument
2083 fld(FPURegister rd, Register rs1, int16_t imm12) fld() argument
2087 fsd(FPURegister source, Register base, int16_t imm12) fsd() argument
2417 c_j(int16_t imm12) c_j() argument
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/third_party/node/deps/v8/src/execution/riscv64/
H A Dsimulator-riscv64.h590 inline int16_t imm12() const { return instr_.Imm12Value(); } in imm12() function in v8::internal::Simulator
/third_party/skia/src/core/
H A DSkVM.h340 void cmp(X n, int imm12) { this->subs(xzr, n, imm12); } in cmp() argument
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/third_party/node/deps/v8/src/codegen/arm/
H A Dassembler-arm.cc2140 void Assembler::ldr_pcrel(Register dst, int imm12, Condition cond) { in ldr_pcrel() argument

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