| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_dpp.c | 145 dpp32_construct( struct dcn3_dpp *dpp, struct dc_context *ctx, uint32_t inst, const struct dcn3_dpp_registers *tf_regs, const struct dcn3_dpp_shift *tf_shift, const struct dcn3_dpp_mask *tf_mask) dpp32_construct() argument
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_dpp.c | 52 struct dcn201_dpp *dpp = TO_DCN201_DPP(dpp_base); in dpp201_cnv_setup() local
183 dpp201_get_optimal_number_of_taps( struct dpp *dpp, struct scaler_data *scl_data, const struct scaling_taps *in_taps) dpp201_get_optimal_number_of_taps() argument
285 dpp201_construct( struct dcn201_dpp *dpp, struct dc_context *ctx, uint32_t inst, const struct dcn201_dpp_registers *tf_regs, const struct dcn201_dpp_shift *tf_shift, const struct dcn201_dpp_mask *tf_mask) dpp201_construct() argument
[all...] |
| H A D | dcn201_hwseq.c | 285 struct dpp *dpp = res_pool->dpps[i]; in dcn201_init_hw() local
305 struct dpp *dpp = res_pool->dpps[i]; in dcn201_init_hw() local
[all...] |
| /kernel/linux/linux-5.10/arch/ia64/kernel/ |
| H A D | unwind_decoder.c | 67 unw_decode_uleb128 (unsigned char **dpp) in unw_decode_uleb128() argument
|
| /kernel/linux/linux-5.10/arch/sparc/vdso/ |
| H A D | vma.c | 250 struct page *dp, **dpp = NULL; in init_vdso_image() local
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dpp_cm.c | 46 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_enable_cm_block() local
62 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp30_get_gamcor_current() local
90 struct dcn3_dpp *dpp in dpp3_program_gammcor_lut() local
137 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_power_on_gamcor_lut() local
154 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_cm_dealpha() local
165 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_cm_bias() local
173 dpp3_gamcor_reg_field( struct dcn3_dpp *dpp, struct dcn3_xfer_func_reg *reg) dpp3_gamcor_reg_field() argument
210 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_configure_gamcor_lut() local
225 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_gamcor_lut() local
311 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_set_hdr_multiplier() local
317 program_gamut_remap( struct dcn3_dpp *dpp, const uint16_t *regval, int select) program_gamut_remap() argument
380 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_cm_set_gamut_remap() local
[all...] |
| H A D | dcn30_dpp.c | 47 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp30_read_state() local
61 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_program_post_csc() local
131 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_set_pre_degam() local
179 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_cnv_setup() local
353 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_set_cursor_attributes() local
378 dpp3_get_optimal_number_of_taps( struct dpp *dpp, struct scaler_data *scl_data, const struct scaling_taps *in_taps) dpp3_get_optimal_number_of_taps() argument
490 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_cnv_set_bias_scale() local
504 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_power_on_blnd_lut() local
515 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_configure_blnd_lut() local
530 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_blnd_pwl() local
557 dcn3_dpp_cm_get_reg_field( struct dcn3_dpp *dpp, struct dcn3_xfer_func_reg *reg) dcn3_dpp_cm_get_reg_field() argument
589 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_blnd_luta_settings() local
617 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_blnd_lutb_settings() local
646 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_get_blndgam_current() local
677 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_blnd_lut() local
718 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_shaper_lut() local
745 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_get_shaper_current() local
771 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_configure_shaper_lut() local
787 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_shaper_luta_settings() local
937 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_shaper_lutb_settings() local
1090 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_shaper() local
1126 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); get3dlut_config() local
1173 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_set_3dlut_mode() local
1192 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_select_3dlut_ram() local
1208 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_set3dlut_ram12() local
1242 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_set3dlut_ram10() local
1261 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_select_3dlut_ram_mask() local
1389 dpp3_construct( struct dcn3_dpp *dpp, struct dc_context *ctx, uint32_t inst, const struct dcn3_dpp_registers *tf_regs, const struct dcn3_dpp_shift *tf_shift, const struct dcn3_dpp_mask *tf_mask) dpp3_construct() argument
[all...] |
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dpp.c | 54 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp20_read_state() local
79 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_power_on_obuf() local
103 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_cnv_setup() local
257 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_cnv_set_bias_scale() local
328 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_cnv_set_alpha_keyer() local
352 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_set_cursor_attributes() local
376 oppn20_dummy_program_regamma_pwl( struct dpp *dpp, const struct pwl_params *params, enum opp_regamma mode) oppn20_dummy_program_regamma_pwl() argument
413 dpp2_construct( struct dcn20_dpp *dpp, struct dc_context *ctx, uint32_t inst, const struct dcn2_dpp_registers *tf_regs, const struct dcn2_dpp_shift *tf_shift, const struct dcn2_dpp_mask *tf_mask) dpp2_construct() argument
[all...] |
| H A D | dcn20_dpp_cm.c | 53 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_enable_cm_block() local
70 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_degamma_ram_inuse() local
93 struct dcn20_dpp *dpp in dpp2_program_degamma_lut() local
138 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_set_degamma() local
161 program_gamut_remap( struct dcn20_dpp *dpp, const uint16_t *regval, enum dcn20_gamut_remap_select select) program_gamut_remap() argument
217 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_cm_set_gamut_remap() local
243 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_program_input_csc() local
314 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_power_on_blnd_lut() local
325 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_configure_blnd_lut() local
340 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_blnd_pwl() local
358 dcn20_dpp_cm_get_reg_field( struct dcn20_dpp *dpp, struct xfer_func_reg *reg) dcn20_dpp_cm_get_reg_field() argument
390 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_blnd_luta_settings() local
418 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_blnd_lutb_settings() local
445 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_get_blndgam_current() local
472 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_blnd_lut() local
511 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_shaper_lut() local
538 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_get_shaper_current() local
564 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_configure_shaper_lut() local
580 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_shaper_luta_settings() local
730 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_shaper_lutb_settings() local
883 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_shaper() local
919 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); get3dlut_config() local
965 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_set_3dlut_mode() local
984 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_select_3dlut_ram() local
1000 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_set3dlut_ram12() local
1034 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_set3dlut_ram10() local
1053 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_select_3dlut_ram_mask() local
1144 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_set_hdr_multiplier() local
[all...] |
| /kernel/linux/linux-6.6/arch/ia64/kernel/ |
| H A D | unwind_decoder.c | 67 unw_decode_uleb128 (unsigned char **dpp) in unw_decode_uleb128() argument
|
| /kernel/linux/linux-6.6/arch/sparc/vdso/ |
| H A D | vma.c | 250 struct page *dp, **dpp = NULL; in init_vdso_image() local
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer_debug.c | 342 struct dpp *dpp = pool->dpps[i]; in dcn10_get_cm_states() local
|
| H A D | dcn10_dpp_cm.c | 91 program_gamut_remap( struct dcn10_dpp *dpp, const uint16_t *regval, enum gamut_remap_select select) program_gamut_remap() argument
164 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_set_gamut_remap() local
184 dpp1_cm_program_color_matrix( struct dcn10_dpp *dpp, const uint16_t *regval) dpp1_cm_program_color_matrix() argument
243 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_set_output_csc_default() local
256 dpp1_cm_get_reg_field( struct dcn10_dpp *dpp, struct xfer_func_reg *reg) dpp1_cm_get_reg_field() argument
283 dpp1_cm_get_degamma_reg_field( struct dcn10_dpp *dpp, struct xfer_func_reg *reg) dpp1_cm_get_degamma_reg_field() argument
313 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_set_output_csc_adjustment() local
321 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_power_on_regamma_lut() local
333 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_program_regamma_lut() local
354 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_configure_regamma_lut() local
368 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_program_regamma_luta_settings() local
397 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_program_regamma_lutb_settings() local
426 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_input_csc() local
500 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_bias_and_scale() local
521 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_degamma_lutb_settings() local
550 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_degamma_luta_settings() local
577 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_power_on_degamma_lut() local
587 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_enable_cm_block() local
597 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_degamma() local
627 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_degamma_ram_select() local
642 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_degamma_ram_inuse() local
665 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_degamma_lut() local
707 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_full_bypass() local
734 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_ingamma_ram_inuse() local
765 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_input_lut() local
813 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_hdr_multiplier() local
[all...] |
| H A D | dcn10_dpp_dscl.c | 88 dpp1_dscl_set_overscan( struct dcn10_dpp *dpp, const struct scaler_data *data) dpp1_dscl_set_overscan() argument
116 dpp1_dscl_set_otg_blank( struct dcn10_dpp *dpp, const struct scaler_data *data) dpp1_dscl_set_otg_blank() argument
201 dpp1_dscl_set_lb( struct dcn10_dpp *dpp, const struct line_buffer_params *lb_params, enum lb_memory_config mem_size_config) dpp1_dscl_set_lb() argument
258 dpp1_dscl_set_scaler_filter( struct dcn10_dpp *dpp, uint32_t taps, enum dcn10_coef_filter_type_sel filter_type, const uint16_t *filter) dpp1_dscl_set_scaler_filter() argument
296 dpp1_dscl_set_scl_filter( struct dcn10_dpp *dpp, const struct scaler_data *scl_data, bool chroma_coef_mode) dpp1_dscl_set_scl_filter() argument
477 dpp1_dscl_find_lb_memory_config(struct dcn10_dpp *dpp, const struct scaler_data *scl_data) dpp1_dscl_find_lb_memory_config() argument
532 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_dscl_set_scaler_auto_scale() local
580 dpp1_dscl_set_manual_ratio_init( struct dcn10_dpp *dpp, const struct scaler_data *data) dpp1_dscl_set_manual_ratio_init() argument
644 dpp1_dscl_set_recout( struct dcn10_dpp *dpp, const struct rect *recout) dpp1_dscl_set_recout() argument
671 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_dscl_set_scaler_manual_scale() local
[all...] |
| H A D | dcn10_dpp.c | 97 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp_read_state() local
123 void dpp_set_gamut_remap_bypass(struct dcn10_dpp *dpp) in dpp_set_gamut_remap_bypass() argument
132 dpp1_get_optimal_number_of_taps( struct dpp *dpp, struct scaler_data *scl_data, const struct scaling_taps *in_taps) dpp1_get_optimal_number_of_taps() argument
198 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp_reset() local
214 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_set_regamma_pwl() local
270 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_degamma_format_float() local
295 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cnv_setup() local
421 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_cursor_attributes() local
444 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_cursor_position() local
483 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cnv_set_optional_cursor_attributes() local
496 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_dppclk_control() local
548 dpp1_construct( struct dcn10_dpp *dpp, struct dc_context *ctx, uint32_t inst, const struct dcn_dpp_registers *tf_regs, const struct dcn_dpp_shift *tf_shift, const struct dcn_dpp_mask *tf_mask) dpp1_construct() argument
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dpp.c | 54 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp20_read_state() local
79 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_power_on_obuf() local
103 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_cnv_setup() local
318 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_cnv_set_alpha_keyer() local
342 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_set_cursor_attributes() local
366 oppn20_dummy_program_regamma_pwl( struct dpp *dpp, const struct pwl_params *params, enum opp_regamma mode) oppn20_dummy_program_regamma_pwl() argument
403 dpp2_construct( struct dcn20_dpp *dpp, struct dc_context *ctx, uint32_t inst, const struct dcn2_dpp_registers *tf_regs, const struct dcn2_dpp_shift *tf_shift, const struct dcn2_dpp_mask *tf_mask) dpp2_construct() argument
[all...] |
| H A D | dcn20_dpp_cm.c | 53 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_enable_cm_block() local
70 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); in dpp2_degamma_ram_inuse() local
93 struct dcn20_dpp *dpp in dpp2_program_degamma_lut() local
138 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_set_degamma() local
161 program_gamut_remap( struct dcn20_dpp *dpp, const uint16_t *regval, enum dcn20_gamut_remap_select select) program_gamut_remap() argument
217 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_cm_set_gamut_remap() local
243 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_program_input_csc() local
314 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_power_on_blnd_lut() local
325 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_configure_blnd_lut() local
340 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_blnd_pwl() local
358 dcn20_dpp_cm_get_reg_field( struct dcn20_dpp *dpp, struct xfer_func_reg *reg) dcn20_dpp_cm_get_reg_field() argument
390 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_blnd_luta_settings() local
418 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_blnd_lutb_settings() local
445 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_get_blndgam_current() local
472 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_blnd_lut() local
511 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_shaper_lut() local
538 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_get_shaper_current() local
564 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_configure_shaper_lut() local
580 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_shaper_luta_settings() local
730 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_shaper_lutb_settings() local
883 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_program_shaper() local
919 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); get3dlut_config() local
965 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_set_3dlut_mode() local
984 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_select_3dlut_ram() local
1000 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_set3dlut_ram12() local
1034 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_set3dlut_ram10() local
1053 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp20_select_3dlut_ram_mask() local
1144 struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base); dpp2_set_hdr_multiplier() local
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer_debug.c | 343 struct dpp *dpp = pool->dpps[i]; in dcn10_get_cm_states() local
|
| H A D | dcn10_dpp_cm.c | 91 program_gamut_remap( struct dcn10_dpp *dpp, const uint16_t *regval, enum gamut_remap_select select) program_gamut_remap() argument
164 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_set_gamut_remap() local
184 dpp1_cm_program_color_matrix( struct dcn10_dpp *dpp, const uint16_t *regval) dpp1_cm_program_color_matrix() argument
243 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_set_output_csc_default() local
256 dpp1_cm_get_reg_field( struct dcn10_dpp *dpp, struct xfer_func_reg *reg) dpp1_cm_get_reg_field() argument
283 dpp1_cm_get_degamma_reg_field( struct dcn10_dpp *dpp, struct xfer_func_reg *reg) dpp1_cm_get_degamma_reg_field() argument
313 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_set_output_csc_adjustment() local
321 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_power_on_regamma_lut() local
333 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_program_regamma_lut() local
354 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_configure_regamma_lut() local
368 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_program_regamma_luta_settings() local
397 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_program_regamma_lutb_settings() local
426 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_input_csc() local
500 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_bias_and_scale() local
521 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_degamma_lutb_settings() local
550 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_degamma_luta_settings() local
577 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_power_on_degamma_lut() local
587 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_enable_cm_block() local
597 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_degamma() local
627 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_degamma_ram_select() local
642 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_degamma_ram_inuse() local
665 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_degamma_lut() local
707 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_full_bypass() local
734 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_ingamma_ram_inuse() local
765 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_program_input_lut() local
813 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_hdr_multiplier() local
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| H A D | dcn10_dpp_dscl.c | 161 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp1_power_on_dscl() local
179 dpp1_dscl_set_lb( struct dcn10_dpp *dpp, const struct line_buffer_params *lb_params, enum lb_memory_config mem_size_config) dpp1_dscl_set_lb() argument
240 dpp1_dscl_set_scaler_filter( struct dcn10_dpp *dpp, uint32_t taps, enum dcn10_coef_filter_type_sel filter_type, const uint16_t *filter) dpp1_dscl_set_scaler_filter() argument
278 dpp1_dscl_set_scl_filter( struct dcn10_dpp *dpp, const struct scaler_data *scl_data, bool chroma_coef_mode) dpp1_dscl_set_scl_filter() argument
459 dpp1_dscl_find_lb_memory_config(struct dcn10_dpp *dpp, const struct scaler_data *scl_data) dpp1_dscl_find_lb_memory_config() argument
510 dpp1_dscl_set_manual_ratio_init( struct dcn10_dpp *dpp, const struct scaler_data *data) dpp1_dscl_set_manual_ratio_init() argument
587 dpp1_dscl_set_recout(struct dcn10_dpp *dpp, const struct rect *recout) dpp1_dscl_set_recout() argument
617 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_dscl_set_scaler_manual_scale() local
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| H A D | dcn10_dpp.c | 97 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); in dpp_read_state() local
124 dpp1_get_optimal_number_of_taps( struct dpp *dpp, struct scaler_data *scl_data, const struct scaling_taps *in_taps) dpp1_get_optimal_number_of_taps() argument
190 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp_reset() local
206 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cm_set_regamma_pwl() local
263 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_degamma_format_float() local
288 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cnv_setup() local
415 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_cursor_attributes() local
438 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_set_cursor_position() local
493 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_cnv_set_optional_cursor_attributes() local
506 struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); dpp1_dppclk_control() local
558 dpp1_construct( struct dcn10_dpp *dpp, struct dc_context *ctx, uint32_t inst, const struct dcn_dpp_registers *tf_regs, const struct dcn_dpp_shift *tf_shift, const struct dcn_dpp_mask *tf_mask) dpp1_construct() argument
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_dpp_cm.c | 46 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp3_enable_cm_block() local
62 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); in dpp30_get_gamcor_current() local
87 struct dcn3_dpp *dpp in dpp3_program_gammcor_lut() local
133 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_power_on_gamcor_lut() local
152 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_cm_dealpha() local
163 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_cm_bias() local
171 dpp3_gamcor_reg_field( struct dcn3_dpp *dpp, struct dcn3_xfer_func_reg *reg) dpp3_gamcor_reg_field() argument
208 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_configure_gamcor_lut() local
223 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_program_gamcor_lut() local
311 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_set_hdr_multiplier() local
317 program_gamut_remap( struct dcn3_dpp *dpp, const uint16_t *regval, int select) program_gamut_remap() argument
380 struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base); dpp3_cm_set_gamut_remap() local
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | dpp.h | 32 struct dpp { struct
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 727 struct dpp *dpp = pipe_ctx->plane_res.dpp; in hwss_setup_dpp() local
744 struct dpp *dpp = pipe_ctx->plane_res.dpp; in hwss_program_bias_and_scale() local
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | dpp.h | 44 struct dpp { struct
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