clk_mux_edc0_p (definition) in projects: kernel - OpenGrok search results

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Searched defs:clk_mux_edc0_p (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/hisilicon/
H A D	clk-hi3660.c	`240 clk_mux_edc0_p[] = {"clk_inv", "clk_ppll0", "clk_ppll1", "clk_inv", variable`
H A D	clk-hi3670.c	`756 clk_mux_edc0_p[] = { "clk_invalid", "clk_invalid", "clk_gate_ppll0_media", variable`
/kernel/linux/linux-6.6/drivers/clk/hisilicon/
H A D	clk-hi3660.c	`240 clk_mux_edc0_p[] = {"clk_inv", "clk_ppll0", "clk_ppll1", "clk_inv", variable`
H A D	clk-hi3670.c	`756 clk_mux_edc0_p[] = { "clk_invalid", "clk_invalid", "clk_gate_ppll0_media", variable`

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