Lines Matching refs:res

322    u_upload_alloc(uploader, 0, size, alignment, &ref->offset, &ref->res, &p);
904 struct iris_resource *res = (struct iris_resource *)ice->state.pixel_hashing_tables;
934 iris_use_pinned_bo(batch, res->bo, false, IRIS_DOMAIN_NONE);
935 iris_record_state_size(batch->state_sizes, res->bo->address + res->offset, size);
939 ptr.SliceHashTableStatePointer = iris_bo_offset_from_base_address(res->bo) +
940 res->offset;
2247 struct pipe_resource *res = shs->sampler_table.res;
2248 struct iris_bo *bo = iris_resource_bo(res);
2266 if (tex && tex->res->base.b.target == PIPE_TEXTURE_3D)
2284 enum pipe_format internal_format = tex->res->internal_format;
2338 struct iris_resource *res,
2366 MIN3(size, res->bo->size - res->offset - offset,
2370 .address = res->bo->address + res->offset + offset,
2375 .mocs = iris_mocs(res->bo, isl_dev, usage));
2403 pipe_resource_reference(&surf_state->ref.res, NULL);
2422 iris_bo_offset_from_base_address(iris_resource_bo(surf_state->ref.res));
2464 struct iris_resource *res,
2475 .mocs = iris_mocs(res->bo, isl_dev, view->usage),
2476 .address = res->bo->address + res->offset + extra_main_offset,
2482 f.aux_surf = &res->aux.surf;
2484 f.clear_color = res->aux.clear_color;
2488 res->external_format,
2491 if (res->aux.bo)
2492 f.aux_address = res->aux.bo->address + res->aux.offset;
2494 if (res->aux.clear_color_bo) {
2495 f.clear_address = res->aux.clear_color_bo->address +
2496 res->aux.clear_color_offset;
2507 struct iris_resource *res,
2520 fill_surface_state(isl_dev, map, res, surf, view, aux_usage,
2559 isv->res = (struct iris_resource *) tex;
2570 isv->clear_color = isv->res->aux.clear_color;
2585 if ((isv->res->aux.usage == ISL_AUX_USAGE_CCS_D ||
2586 isv->res->aux.usage == ISL_AUX_USAGE_CCS_E ||
2587 isv->res->aux.usage == ISL_AUX_USAGE_GFX12_CCS_E) &&
2590 } else if (isl_aux_usage_has_hiz(isv->res->aux.usage) &&
2591 !iris_sample_with_depth_aux(devinfo, isv->res)) {
2595 1 << isv->res->aux.usage;
2599 isv->surface_state.bo_address = isv->res->bo->address;
2619 fill_surface_states(&screen->isl_dev, &isv->surface_state, isv->res,
2620 &isv->res->surf, &isv->view, 0, 0, 0);
2622 fill_buffer_surface_state(&screen->isl_dev, isv->res,
2638 pipe_resource_reference(&isv->surface_state.ref.res, NULL);
2678 struct iris_resource *res = (struct iris_resource *) tex;
2708 struct isl_surf read_surf = res->surf;
2724 isl_surf_get_image_surf(&screen->isl_dev, &res->surf,
2742 struct isl_surf isl_surf = res->surf;
2745 if (isl_format_is_compressed(res->surf.format)) {
2754 assert(res->aux.usage == ISL_AUX_USAGE_NONE);
2755 assert(res->surf.samples == 1);
2759 &res->surf, view,
2768 surf->clear_color = res->aux.clear_color;
2783 if (res->surf.usage & (ISL_SURF_USAGE_DEPTH_BIT |
2792 if ((res->aux.usage == ISL_AUX_USAGE_CCS_E ||
2793 res->aux.usage == ISL_AUX_USAGE_GFX12_CCS_E) &&
2798 1 << res->aux.usage;
2802 surf->surface_state.bo_address = res->bo->address;
2803 fill_surface_states(&screen->isl_dev, &surf->surface_state, res,
2808 surf->surface_state_read.bo_address = res->bo->address;
2809 fill_surface_states(&screen->isl_dev, &surf->surface_state_read, res,
2874 struct iris_resource *res = (void *) img->resource;
2880 res->bind_history |= PIPE_BIND_SHADER_IMAGE;
2881 res->bind_stages |= 1 << stage;
2889 aux_usages |= 1 << res->aux.usage;
2892 iv->surface_state.bo_address = res->bo->address;
2894 if (res->base.b.target != PIPE_BUFFER) {
2907 fill_buffer_surface_state(&screen->isl_dev, res,
2910 0, res->bo->size,
2913 fill_surface_states(&screen->isl_dev, &iv->surface_state, res,
2914 &res->surf, &view, 0, 0, 0);
2919 &res->surf, &view);
2921 util_range_add(&res->base.b, &res->valid_buffer_range, img->u.buf.offset,
2924 fill_buffer_surface_state(&screen->isl_dev, res,
2936 pipe_resource_reference(&iv->surface_state.ref.res, NULL);
2961 return view && view->res->base.b.target == PIPE_TEXTURE_3D;
3004 view->res->bind_history |= PIPE_BIND_SAMPLER_VIEW;
3005 view->res->bind_stages |= 1 << stage;
3010 &view->surface_state, view->res->bo);
3046 struct iris_resource *res = (void *) resources[i];
3047 assert(res->base.b.target == PIPE_BUFFER);
3048 util_range_add(&res->base.b, &res->valid_buffer_range,
3049 0, res->base.b.width0);
3053 addr += res->bo->address + res->offset;
3095 pipe_resource_reference(&surf->surface_state.ref.res, NULL);
3096 pipe_resource_reference(&surf->surface_state_read.ref.res, NULL);
3346 iris_bo_offset_from_base_address(iris_resource_bo(ice->state.null_fb.res));
3380 pipe_resource_reference(&shs->constbuf_surf_state[index].res, NULL);
3420 struct iris_resource *res = (void *) cbuf->buffer;
3421 res->bind_history |= PIPE_BIND_CONSTANT_BUFFER;
3422 res->bind_stages |= 1 << stage;
3548 struct iris_resource *res = (void *) buffers[i].buffer;
3552 pipe_resource_reference(&ssbo->buffer, &res->base.b);
3555 MIN2(buffers[i].buffer_size, res->bo->size - ssbo->buffer_offset);
3563 res->bind_history |= PIPE_BIND_SHADER_BUFFER;
3564 res->bind_stages |= 1 << stage;
3566 util_range_add(&res->base.b, &res->valid_buffer_range, ssbo->buffer_offset,
3570 pipe_resource_reference(&shs->ssbo_surf_state[start_slot + i].res,
3628 struct iris_resource *res = (void *) state->resource;
3632 if (res) {
3634 res->bind_history |= PIPE_BIND_VERTEX_BUFFER;
3641 if (res) {
3642 vb.BufferSize = res->base.b.width0 - (int) buffer->buffer_offset;
3644 ro_bo(NULL, res->bo->address + (int) buffer->buffer_offset);
3645 vb.MOCS = iris_mocs(res->bo, &screen->isl_dev,
3825 struct iris_resource *res = (void *) p_res;
3830 res->bind_history |= PIPE_BIND_STREAM_OUTPUT;
3838 util_range_add(&res->base.b, &res->valid_buffer_range, buffer_offset,
3851 pipe_resource_reference(&cso->offset.res, NULL);
3925 if (!tgt->offset.res)
3928 struct iris_resource *res = (void *) tgt->base.buffer;
3957 rw_bo(NULL, res->bo->address + tgt->base.buffer_offset,
3962 sob.MOCS = iris_mocs(res->bo, &screen->isl_dev, 0);
3966 rw_bo(NULL, iris_resource_bo(tgt->offset.res)->address +
4460 struct iris_resource *res = (void *) shader->assembly.res;
4461 return iris_bo_offset_from_base_address(res->bo) + shader->assembly.offset;
4831 struct iris_bo *state_bo = iris_resource_bo(ice->state.unbound_tex.res);
4842 if (!ice->state.null_fb.res)
4845 struct iris_bo *state_bo = iris_resource_bo(ice->state.null_fb.res);
4864 struct iris_resource *res,
4869 struct iris_bo *state_bo = iris_resource_bo(surf_state->ref.res);
4875 uint32_t *color = res->aux.clear_color.u32;
4906 struct iris_resource *res,
4923 surf_state_update_clear_value(batch, res, surf_state, aux_usage);
4929 fill_surface_states(isl_dev, surf_state, res, &res->surf, view, 0, 0, 0);
4940 iris_use_pinned_bo(batch, iris_resource_bo(surf_state->ref.res), false,
4963 struct iris_resource *res = (void *) p_surf->texture;
4965 if (GFX_VER == 8 && is_read_surface && !surf->surface_state_read.ref.res) {
4970 if (!surf->surface_state.ref.res) {
4975 if (memcmp(&res->aux.clear_color, &surf->clear_color,
4977 update_clear_value(ice, batch, res, &surf->surface_state, &surf->view);
4979 update_clear_value(ice, batch, res, &surf->surface_state_read,
4982 surf->clear_color = res->aux.clear_color;
4985 if (res->aux.clear_color_bo)
4986 iris_use_pinned_bo(batch, res->aux.clear_color_bo, false, access);
4988 if (res->aux.bo)
4989 iris_use_pinned_bo(batch, res->aux.bo, writeable, access);
4991 iris_use_pinned_bo(batch, res->bo, writeable, access);
5006 iris_resource_texture_aux_usage(ice, isv->res, isv->view.format);
5008 if (!isv->surface_state.ref.res)
5011 if (memcmp(&isv->res->aux.clear_color, &isv->clear_color,
5013 update_clear_value(ice, batch, isv->res, &isv->surface_state,
5015 isv->clear_color = isv->res->aux.clear_color;
5018 if (isv->res->aux.clear_color_bo) {
5019 iris_use_pinned_bo(batch, isv->res->aux.clear_color_bo,
5023 if (isv->res->aux.bo) {
5024 iris_use_pinned_bo(batch, isv->res->aux.bo,
5028 iris_use_pinned_bo(batch, isv->res->bo, false, IRIS_DOMAIN_SAMPLER_READ);
5040 if (!buf->buffer || !surf_state->res)
5044 iris_use_pinned_bo(batch, iris_resource_bo(surf_state->res), false,
5056 struct iris_resource *res = (void *) iv->base.resource;
5058 if (!res)
5063 iris_use_pinned_bo(batch, res->bo, write, IRIS_DOMAIN_NONE);
5065 if (res->aux.bo)
5066 iris_use_pinned_bo(batch, res->aux.bo, write, IRIS_DOMAIN_NONE);
5121 iris_use_pinned_bo(batch, iris_resource_bo(grid_data->res), false,
5123 iris_use_pinned_bo(batch, iris_resource_bo(grid_state->res), false,
5201 struct pipe_resource *res,
5205 if (res) {
5206 struct iris_bo *bo = iris_resource_bo(res);
5254 iris_use_pinned_bo(batch, iris_resource_bo(ref->res),
5257 iris_resource_bo(ref->res)->address -
5325 iris_use_pinned_bo(batch, iris_resource_bo(tgt->offset.res),
5355 struct iris_resource *res = (void *) cbuf->buffer;
5357 if (res)
5358 iris_use_pinned_bo(batch, res->bo, false, IRIS_DOMAIN_OTHER_READ);
5374 struct pipe_resource *res = shs->sampler_table.res;
5375 if (res)
5376 iris_use_pinned_bo(batch, iris_resource_bo(res), false,
5385 struct iris_bo *bo = iris_resource_bo(shader->assembly.res);
5406 struct pipe_resource *res = genx->vertex_buffers[i].resource;
5407 iris_use_pinned_bo(batch, iris_resource_bo(res), false,
5435 struct pipe_resource *sampler_res = shs->sampler_table.res;
5452 struct iris_bo *bo = iris_resource_bo(shader->assembly.res);
5641 struct iris_resource *res = (void *) cbuf->buffer;
5645 if (res)
5646 iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_OTHER_READ);
5650 res ? ro_bo(res->bo, range->start * 32 + cbuf->buffer_offset)
6101 struct pipe_resource *res = shs->sampler_table.res;
6102 if (res)
6103 iris_use_pinned_bo(batch, iris_resource_bo(res), false,
6138 struct iris_resource *cache = (void *) shader->assembly.res;
6261 iris_use_pinned_bo(batch, iris_resource_bo(tgt->offset.res),
6563 assert(ice->draw.draw_params.res);
6567 pipe_resource_reference(&state->resource, ice->draw.draw_params.res);
6568 struct iris_resource *res = (void *) state->resource;
6574 vb.BufferSize = res->bo->size - ice->draw.draw_params.offset;
6576 ro_bo(NULL, res->bo->address +
6578 vb.MOCS = iris_mocs(res->bo, &screen->isl_dev,
6592 ice->draw.derived_draw_params.res);
6593 struct iris_resource *res = (void *) ice->draw.derived_draw_params.res;
6600 res->bo->size - ice->draw.derived_draw_params.offset;
6602 ro_bo(NULL, res->bo->address +
6604 vb.MOCS = iris_mocs(res->bo, &screen->isl_dev,
6640 struct iris_resource *res =
6642 if (res) {
6643 iris_use_pinned_bo(batch, res->bo, false, IRIS_DOMAIN_VF_READ);
6645 high_bits = res->bo->address >> 32ull;
6926 struct iris_resource *res = (void *) draw->index.resource;
6927 res->bind_history |= PIPE_BIND_INDEX_BUFFER;
6933 iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_VF_READ);
7051 struct iris_bo *so_bo = iris_resource_bo(so->offset.res);
7105 struct iris_bo *bo = iris_resource_bo(grid_size->res);
7272 struct pipe_resource *res = ice->state.global_bindings[i];
7273 if (!res)
7276 iris_use_pinned_bo(batch, iris_resource_bo(res),
7368 iris_use_optional_res(batch, shs->sampler_table.res, false,
7370 iris_use_pinned_bo(batch, iris_resource_bo(shader->assembly.res), false,
7405 pipe_resource_reference(&ice->draw.draw_params.res, NULL);
7406 pipe_resource_reference(&ice->draw.derived_draw_params.res, NULL);
7426 pipe_resource_reference(&shs->sampler_table.res, NULL);
7429 pipe_resource_reference(&shs->constbuf_surf_state[i].res, NULL);
7433 pipe_resource_reference(&shs->image[i].surface_state.ref.res, NULL);
7438 pipe_resource_reference(&shs->ssbo_surf_state[i].res, NULL);
7446 pipe_resource_reference(&ice->state.grid_size.res, NULL);
7447 pipe_resource_reference(&ice->state.grid_surf_state.res, NULL);
7449 pipe_resource_reference(&ice->state.null_fb.res, NULL);
7450 pipe_resource_reference(&ice->state.unbound_tex.res, NULL);
7466 struct iris_resource *res)
7471 assert(res->base.b.target == PIPE_BUFFER);
7476 assert(!(res->bind_history & (PIPE_BIND_DEPTH_STENCIL |
7484 if (res->bind_history & PIPE_BIND_VERTEX_BUFFER) {
7512 if (res->bind_history & PIPE_BIND_STREAM_OUTPUT) {
7537 if (!(res->bind_stages & (1 << s)))
7540 if (res->bind_history & PIPE_BIND_CONSTANT_BUFFER) {
7548 if (res->bo == iris_resource_bo(cbuf->buffer)) {
7549 pipe_resource_reference(&surf_state->res, NULL);
7558 if (res->bind_history & PIPE_BIND_SHADER_BUFFER) {
7564 if (res->bo == iris_resource_bo(ssbo->buffer)) {
7566 .buffer = &res->base.b,
7576 if (res->bind_history & PIPE_BIND_SAMPLER_VIEW) {
7581 struct iris_bo *bo = isv->res->bo;
7590 if (res->bind_history & PIPE_BIND_SHADER_IMAGE) {
8509 iris_bo_offset_from_base_address(iris_resource_bo(ice->state.unbound_tex.res));