Lines Matching refs:grid
3434 const struct pipe_grid_info *grid)
3459 memcpy(map, grid->input, shader->kernel_input_size);
3507 value = grid->work_dim;
5423 const struct pipe_grid_info *grid)
7096 const struct pipe_grid_info *grid)
7102 assert(grid->indirect);
7121 const struct pipe_grid_info *grid)
7133 brw_cs_get_dispatch_info(devinfo, cs_prog_data, grid->block);
7147 if (grid->indirect)
7148 iris_load_indirect_location(ice, batch, grid);
7153 cw.IndirectParameterEnable = grid->indirect;
7155 cw.LocalXMaximum = grid->block[0] - 1;
7156 cw.LocalYMaximum = grid->block[1] - 1;
7157 cw.LocalZMaximum = grid->block[2] - 1;
7158 cw.ThreadGroupIDXDimension = grid->grid[0];
7159 cw.ThreadGroupIDYDimension = grid->grid[1];
7160 cw.ThreadGroupIDZDimension = grid->grid[2];
7178 trace_intel_end_compute(&batch->trace, grid->grid[0], grid->grid[1], grid->grid[2]);
7186 const struct pipe_grid_info *grid)
7200 brw_cs_get_dispatch_info(devinfo, cs_prog_data, grid->block);
7310 if (grid->indirect)
7311 iris_load_indirect_location(ice, batch, grid);
7316 ggw.IndirectParameterEnable = grid->indirect != NULL;
7321 ggw.ThreadGroupIDXDimension = grid->grid[0];
7322 ggw.ThreadGroupIDYDimension = grid->grid[1];
7323 ggw.ThreadGroupIDZDimension = grid->grid[2];
7330 trace_intel_end_compute(&batch->trace, grid->grid[0], grid->grid[1], grid->grid[2]);
7338 const struct pipe_grid_info *grid)
7360 upload_sysvals(ice, MESA_SHADER_COMPUTE, grid);
7382 iris_upload_compute_walker(ice, batch, grid);
7384 iris_upload_gpgpu_walker(ice, batch, grid);
7388 iris_restore_compute_saved_bos(ice, batch, grid);