Lines Matching defs:surf
2465 struct isl_surf *surf,
2473 .surf = surf,
2482 f.aux_surf = &res->aux.surf;
2489 surf->usage).fmt;
2508 struct isl_surf *surf,
2520 fill_surface_state(isl_dev, map, res, surf, view, aux_usage,
2620 &isv->res->surf, &isv->view, 0, 0, 0);
2677 struct iris_surface *surf = calloc(1, sizeof(struct iris_surface));
2680 if (!surf)
2685 struct isl_view *view = &surf->view;
2697 struct isl_view *read_view = &surf->read_view;
2708 struct isl_surf read_surf = res->surf;
2724 isl_surf_get_image_surf(&screen->isl_dev, &res->surf,
2742 struct isl_surf isl_surf = res->surf;
2745 if (isl_format_is_compressed(res->surf.format)) {
2755 assert(res->surf.samples == 1);
2759 &res->surf, view,
2763 free(surf);
2768 surf->clear_color = res->aux.clear_color;
2770 struct pipe_surface *psurf = &surf->base;
2783 if (res->surf.usage & (ISL_SURF_USAGE_DEPTH_BIT |
2801 alloc_surface_states(&surf->surface_state, aux_usages);
2802 surf->surface_state.bo_address = res->bo->address;
2803 fill_surface_states(&screen->isl_dev, &surf->surface_state, res,
2807 alloc_surface_states(&surf->surface_state_read, aux_usages);
2808 surf->surface_state_read.bo_address = res->bo->address;
2809 fill_surface_states(&screen->isl_dev, &surf->surface_state_read, res,
2914 &res->surf, &view, 0, 0, 0);
2919 &res->surf, &view);
3093 struct iris_surface *surf = (void *) p_surf;
3095 pipe_resource_reference(&surf->surface_state.ref.res, NULL);
3096 pipe_resource_reference(&surf->surface_state_read.ref.res, NULL);
3097 free(surf->surface_state.cpu);
3098 free(surf->surface_state_read.cpu);
3099 free(surf);
3308 info.depth_surf = &zres->surf;
3312 view.format = zres->surf.format;
3316 info.hiz_surf = &zres->aux.surf;
3326 info.stencil_surf = &stencil_res->surf;
3329 view.format = stencil_res->surf.format;
4929 fill_surface_states(isl_dev, surf_state, res, &res->surf, view, 0, 0, 0);
4962 struct iris_surface *surf = (void *) p_surf;
4965 if (GFX_VER == 8 && is_read_surface && !surf->surface_state_read.ref.res) {
4967 &surf->surface_state_read);
4970 if (!surf->surface_state.ref.res) {
4972 &surf->surface_state);
4975 if (memcmp(&res->aux.clear_color, &surf->clear_color,
4976 sizeof(surf->clear_color)) != 0) {
4977 update_clear_value(ice, batch, res, &surf->surface_state, &surf->view);
4979 update_clear_value(ice, batch, res, &surf->surface_state_read,
4980 &surf->read_view);
4982 surf->clear_color = res->aux.clear_color;
4994 return use_surface_state(batch, &surf->surface_state_read, aux_usage);
4996 return use_surface_state(batch, &surf->surface_state, aux_usage);
5752 const struct isl_surf *surf)
5755 const bool is_d16_1x_msaa = surf->format == ISL_FORMAT_R16_UNORM &&
5756 surf->samples == 1;
6513 genX(emit_depth_state_workarounds)(ice, batch, &zres->surf);