Lines Matching refs:sp
85 LOAD sp, 0(t1)
86 //LOAD sp, 0x0(sp) /* Read sp from first TCB member */
89 LOAD t0, 0 * REGBYTES(sp)
92 LOAD t0, (portRegNum - 1) * REGBYTES(sp)
96 LOAD x1, 1 * REGBYTES(sp) /* RA */
97 LOAD x5, 2 * REGBYTES(sp)
98 LOAD x6, 3 * REGBYTES(sp)
99 LOAD x7, 4 * REGBYTES(sp)
100 LOAD x8, 5 * REGBYTES(sp)
101 LOAD x9, 6 * REGBYTES(sp)
102 LOAD x10, 7 * REGBYTES(sp)
103 LOAD x11, 8 * REGBYTES(sp)
104 LOAD x12, 9 * REGBYTES(sp)
105 LOAD x13, 10 * REGBYTES(sp)
106 LOAD x14, 11 * REGBYTES(sp)
107 LOAD x15, 12 * REGBYTES(sp)
109 LOAD x16, 13 * REGBYTES(sp)
110 LOAD x17, 14 * REGBYTES(sp)
111 LOAD x18, 15 * REGBYTES(sp)
112 LOAD x19, 16 * REGBYTES(sp)
113 LOAD x20, 17 * REGBYTES(sp)
114 LOAD x21, 18 * REGBYTES(sp)
115 LOAD x22, 19 * REGBYTES(sp)
116 LOAD x23, 20 * REGBYTES(sp)
117 LOAD x24, 21 * REGBYTES(sp)
118 LOAD x25, 22 * REGBYTES(sp)
119 LOAD x26, 23 * REGBYTES(sp)
120 LOAD x27, 24 * REGBYTES(sp)
121 LOAD x28, 25 * REGBYTES(sp)
122 LOAD x29, 26 * REGBYTES(sp)
123 LOAD x30, 27 * REGBYTES(sp)
124 LOAD x31, 28 * REGBYTES(sp)
127 addi sp, sp, portCONTEXT_SIZE
135 addi sp, sp, -portCONTEXT_SIZE
136 STORE x1, 1 * REGBYTES(sp) /* RA */
137 STORE x5, 2 * REGBYTES(sp)
138 STORE x6, 3 * REGBYTES(sp)
139 STORE x7, 4 * REGBYTES(sp)
140 STORE x8, 5 * REGBYTES(sp)
141 STORE x9, 6 * REGBYTES(sp)
142 STORE x10, 7 * REGBYTES(sp)
143 STORE x11, 8 * REGBYTES(sp)
144 STORE x12, 9 * REGBYTES(sp)
145 STORE x13, 10 * REGBYTES(sp)
146 STORE x14, 11 * REGBYTES(sp)
147 STORE x15, 12 * REGBYTES(sp)
149 STORE x16, 13 * REGBYTES(sp)
150 STORE x17, 14 * REGBYTES(sp)
151 STORE x18, 15 * REGBYTES(sp)
152 STORE x19, 16 * REGBYTES(sp)
153 STORE x20, 17 * REGBYTES(sp)
154 STORE x21, 18 * REGBYTES(sp)
155 STORE x22, 19 * REGBYTES(sp)
156 STORE x23, 20 * REGBYTES(sp)
157 STORE x24, 21 * REGBYTES(sp)
158 STORE x25, 22 * REGBYTES(sp)
159 STORE x26, 23 * REGBYTES(sp)
160 STORE x27, 24 * REGBYTES(sp)
161 STORE x28, 25 * REGBYTES(sp)
162 STORE x29, 26 * REGBYTES(sp)
163 STORE x30, 27 * REGBYTES(sp)
164 STORE x31, 28 * REGBYTES(sp)
168 STORE t0, (portRegNum - 1) * REGBYTES(sp)
172 /* Store sp to task stack */
175 STORE sp, 0(t0)
178 STORE t0, 0(sp)
185 LOAD sp, 0x0(t0) /* Read sp from first TCB member */
188 LOAD t0, 0 * REGBYTES(sp)
193 LOAD t0, (portRegNum - 1) * REGBYTES(sp)
197 LOAD x1, 1 * REGBYTES(sp) /* RA */
198 LOAD x5, 2 * REGBYTES(sp)
199 LOAD x6, 3 * REGBYTES(sp)
200 LOAD x7, 4 * REGBYTES(sp)
201 LOAD x8, 5 * REGBYTES(sp)
202 LOAD x9, 6 * REGBYTES(sp)
203 LOAD x10, 7 * REGBYTES(sp)
204 LOAD x11, 8 * REGBYTES(sp)
205 LOAD x12, 9 * REGBYTES(sp)
206 LOAD x13, 10 * REGBYTES(sp)
207 LOAD x14, 11 * REGBYTES(sp)
208 LOAD x15, 12 * REGBYTES(sp)
210 LOAD x16, 13 * REGBYTES(sp)
211 LOAD x17, 14 * REGBYTES(sp)
212 LOAD x18, 15 * REGBYTES(sp)
213 LOAD x19, 16 * REGBYTES(sp)
214 LOAD x20, 17 * REGBYTES(sp)
215 LOAD x21, 18 * REGBYTES(sp)
216 LOAD x22, 19 * REGBYTES(sp)
217 LOAD x23, 20 * REGBYTES(sp)
218 LOAD x24, 21 * REGBYTES(sp)
219 LOAD x25, 22 * REGBYTES(sp)
220 LOAD x26, 23 * REGBYTES(sp)
221 LOAD x27, 24 * REGBYTES(sp)
222 LOAD x28, 25 * REGBYTES(sp)
223 LOAD x29, 26 * REGBYTES(sp)
224 LOAD x30, 27 * REGBYTES(sp)
225 LOAD x31, 28 * REGBYTES(sp)
228 addi sp, sp, portCONTEXT_SIZE