Lines Matching refs:x48
75 EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
311 EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */
318 EMIT3_off32(0x48, 0x81, 0xEC, round_up(stack_depth, 8));
508 EMIT4_off32(0x48, 0x8B, 0x8C, 0xD6, /* mov rcx, [rsi + rdx * 8 + offsetof(...)] */
515 EMIT3(0x48, 0x85, 0xC9); /* test rcx,rcx */
524 EMIT3_off32(0x48, 0x81, 0xC4, /* add rsp, sd */
528 EMIT4(0x48, 0x8B, 0x49, /* mov rcx, qword ptr [rcx + 32] */
530 EMIT4(0x48, 0x83, 0xC1, /* add rcx, X86_TAIL_CALL_OFFSET */
576 EMIT3_off32(0x48, 0x81, 0xC4, round_up(stack_depth, 8));
636 b1 = add_1mod(0x48, dst_reg);
679 EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
712 EMIT4(add_2mod(0x48, src_reg, dst_reg), 0x0f, 0xbe,
715 EMIT4(add_2mod(0x48, src_reg, dst_reg), 0x0f, 0xbf,
718 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x63,
764 EMIT1(add_2mod(0x48, dst_reg, src_reg));
778 EMIT1(add_1mod(0x48, reg));
792 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
796 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
807 EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
822 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xBE);
826 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xBF);
830 EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x63);
864 EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
1023 EMIT3_off32(0x48, 0x8B, 0x85, -round_up(stack, 8) - 8)
1215 EMIT2(0x48, 0x99); /* cqo */
1366 EMIT3(add_1mod(0x48, dst_reg), 0x0F,
1422 EMIT2(add_1mod(0x48, dst_reg), 0xC7);
1475 EMIT2(add_1mod(0x48, AUX_REG), add_1reg(0xB8, AUX_REG));
2104 * EMIT4(0x48, 0x8B, 0x7D, 0xF0); mov rdi,QWORD PTR [rbp-0x10]
2105 * EMIT4(0x48, 0x8B, 0x75, 0xF8); mov rsi,QWORD PTR [rbp-0x8]
2155 EMIT3_off32(0x48, 0x8D, 0xB5, -run_ctx_off);
2157 EMIT4(0x48, 0x8D, 0x75, -run_ctx_off);
2167 EMIT3(0x48, 0x85, 0xC0); /* test rax,rax */
2174 EMIT3_off32(0x48, 0x8D, 0xBD, -stack_size);
2176 EMIT4(0x48, 0x8D, 0x7D, -stack_size);
2207 EMIT3_off32(0x48, 0x8D, 0x95, -run_ctx_off);
2209 EMIT4(0x48, 0x8D, 0x55, -run_ctx_off);
2280 EMIT4(0x48, 0x83, 0x7d, 0xf8); EMIT1(0x00);
2463 EMIT3(0x48, 0x89, 0xE5); /* mov rbp, rsp */
2466 EMIT3_off32(0x48, 0x81, 0xEC, stack_size);
2469 EMIT4(0x48, 0x83, 0xEC, stack_size);
2597 EMIT4(0x48, 0x83, 0xC4, 8); /* add rsp, 8 */
2621 EMIT1(add_1mod(0x48, BPF_REG_3)); /* cmp rdx,func */
2642 EMIT1(add_1mod(0x48, BPF_REG_3)); /* cmp rdx,func */