Lines Matching refs:fe_logical
1617 ex->fe_len, ex->fe_logical);
1714 ac->ac_b_ex.fe_logical = ac->ac_g_ex.fe_logical;
1922 ex.fe_logical = 0xDEADFA11; /* debug value */
2065 ex.fe_logical = 0xDEADC0DE; /* debug value */
2106 ex.fe_logical = 0xDEADF00D; /* debug value */
3600 start_off = ((loff_t)ac->ac_o_ex.fe_logical >>
3604 start_off = ((loff_t)ac->ac_o_ex.fe_logical >>
3609 start_off = ((loff_t)ac->ac_o_ex.fe_logical >>
3613 start_off = (loff_t) ac->ac_o_ex.fe_logical << bsbits;
3626 start = max(start, rounddown(ac->ac_o_ex.fe_logical,
3666 BUG_ON(!(ac->ac_o_ex.fe_logical >= pa_end ||
3667 ac->ac_o_ex.fe_logical < pa->pa_lstart));
3677 if (pa_end <= ac->ac_o_ex.fe_logical) {
3680 } else if (pa->pa_lstart > ac->ac_o_ex.fe_logical) {
3703 if (start + size <= ac->ac_o_ex.fe_logical &&
3704 start > ac->ac_o_ex.fe_logical) {
3706 "start %lu, size %lu, fe_logical %lu",
3708 (unsigned long) ac->ac_o_ex.fe_logical);
3717 ac->ac_g_ex.fe_logical = start;
3815 start = pa->pa_pstart + (ac->ac_o_ex.fe_logical - pa->pa_lstart);
3911 if (ac->ac_o_ex.fe_logical < pa->pa_lstart ||
3912 ac->ac_o_ex.fe_logical >= pa_logical_end(sbi, pa))
4158 .fe_logical = ac->ac_g_ex.fe_logical,
4166 BUG_ON(ac->ac_g_ex.fe_logical > ac->ac_o_ex.fe_logical);
4182 ex.fe_logical = orig_goal_end - EXT4_C2B(sbi, ex.fe_len);
4183 if (ac->ac_o_ex.fe_logical >= ex.fe_logical)
4186 ex.fe_logical = ac->ac_g_ex.fe_logical;
4187 if (ac->ac_o_ex.fe_logical < extent_logical_end(sbi, &ex))
4190 ex.fe_logical = ac->ac_o_ex.fe_logical;
4192 ac->ac_b_ex.fe_logical = ex.fe_logical;
4194 BUG_ON(ac->ac_o_ex.fe_logical < ac->ac_b_ex.fe_logical);
4203 pa->pa_lstart = ac->ac_b_ex.fe_logical;
4683 (unsigned long)ac->ac_o_ex.fe_logical,
4687 (unsigned long)ac->ac_g_ex.fe_logical,
4691 (unsigned long)ac->ac_b_ex.fe_logical,
4791 ac->ac_b_ex.fe_logical = EXT4_LBLK_CMASK(sbi, ar->logical);
4795 ac->ac_o_ex.fe_logical = ac->ac_b_ex.fe_logical;