Lines Matching refs:value
243 /* true if TUNE1 register must be updated by fused value, else TUNE2 */
294 * to value
298 u8 value;
333 * @cell: nvmem cell containing phy tuning value
427 or->imp_res_offset.value << IMP_RES_OFFSET_SHIFT,
432 or->bias_ctrl.value << BIAS_CTRL2_RES_OFFSET_SHIFT,
437 or->charge_ctrl.value << CHG_CTRL2_OFFSET_SHIFT,
442 or->hstx_trim.value << HSTX_TRIM_SHIFT,
447 or->preemphasis.value << PREEMPHASIS_EN_SHIFT,
451 if (or->preemphasis_width.value ==
464 or->hsdisc_trim.value << HSDISC_TRIM_SHIFT,
469 * Fetches HS Tx tuning value from nvmem and sets the
471 * For error case, skip setting the value and use the default value.
485 * If efuse register shows value as 0x0 (indicating value is not
487 * then use default value for high nibble that we have already
492 dev_dbg(dev, "failed to read a valid hs-tx trim value\n");
498 dev_dbg(dev, "failed to read a valid hs-tx trim value\n");
502 /* Fused TUNE1/2 value is the higher nibble only */
688 /* save reset value to override reference clock scheme later */
698 /* Set efuse value for tuning the PHY */
854 u32 value;
920 dev_dbg(dev, "failed to lookup tune2 hstx trim value\n");
923 if (!of_property_read_u32(dev->of_node, "qcom,imp-res-offset-value",
924 &value)) {
925 or->imp_res_offset.value = (u8)value;
929 if (!of_property_read_u32(dev->of_node, "qcom,bias-ctrl-value",
930 &value)) {
931 or->bias_ctrl.value = (u8)value;
935 if (!of_property_read_u32(dev->of_node, "qcom,charge-ctrl-value",
936 &value)) {
937 or->charge_ctrl.value = (u8)value;
941 if (!of_property_read_u32(dev->of_node, "qcom,hstx-trim-value",
942 &value)) {
943 or->hstx_trim.value = (u8)value;
948 &value)) {
949 or->preemphasis.value = (u8)value;
954 &value)) {
955 or->preemphasis_width.value = (u8)value;
959 if (!of_property_read_u32(dev->of_node, "qcom,hsdisc-trim-value",
960 &value)) {
961 or->hsdisc_trim.value = (u8)value;