Lines Matching refs:QUSB2PHY_PORT_TUNE1
77 /* QUSB2PHY_PORT_TUNE1 register bits */
127 QUSB2PHY_PORT_TUNE1,
140 [QUSB2PHY_PORT_TUNE1] = 0x80,
152 QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xf8),
170 [QUSB2PHY_PORT_TUNE1] = 0x23c,
186 QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xa5),
195 [QUSB2PHY_PORT_TUNE1] = 0x240,
218 QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0x30),
441 qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1],
446 qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1],
454 cfg->regs[QUSB2PHY_PORT_TUNE1],
458 cfg->regs[QUSB2PHY_PORT_TUNE1],
470 * QUSB2PHY_PORT_TUNE1/2 register.
504 qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1],