Lines Matching refs:ndcr
324 * @ndcr: Controller register value for this NAND chip
336 u32 ndcr;
540 u32 ndcr;
551 ndcr = readl_relaxed(nfc->regs + NDCR);
554 ndcr &= ~(NDCR_DWIDTH_M | NDCR_DWIDTH_C);
556 ndcr |= NDCR_DWIDTH_M | NDCR_DWIDTH_C;
558 writel_relaxed(ndcr, nfc->regs + NDCR);
602 u32 ndcr, val;
612 ndcr = readl_relaxed(nfc->regs + NDCR);
616 writel_relaxed(ndcr | NDCR_ND_RUN, nfc->regs + NDCR);
768 writel_relaxed(ndcr_generic | marvell_nand->ndcr, nfc->regs + NDCR);
811 u32 ndcr = readl_relaxed(nfc->regs + NDCR);
813 if (!(ndcr & NDCR_ECC_EN)) {
814 writel_relaxed(ndcr | NDCR_ECC_EN, nfc->regs + NDCR);
828 u32 ndcr = readl_relaxed(nfc->regs + NDCR);
830 if (ndcr & NDCR_ECC_EN) {
831 writel_relaxed(ndcr & ~NDCR_ECC_EN, nfc->regs + NDCR);
2498 marvell_nand->ndcr = NDCR_PAGE_SZ(mtd->writesize);
2500 marvell_nand->ndcr |= NDCR_DWIDTH_M | NDCR_DWIDTH_C;
2510 marvell_nand->ndcr |= NDCR_RA_START;