Lines Matching refs:smbus
428 struct mlxbf_i2c_resource *smbus;
518 if (mlxbf_smbus_poll(priv->smbus->io, addr, mask, true, timeout))
529 if (mlxbf_smbus_poll(priv->smbus->io, MLXBF_I2C_SMBUS_MASTER_GW,
540 writel(0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_GW);
580 mlxbf_smbus_poll(priv->smbus->io, MLXBF_I2C_SMBUS_MASTER_GW,
593 master_status_bits = readl(priv->smbus->io +
635 iowrite32be(data32, priv->smbus->io + addr + offset);
656 data32 = ioread32be(priv->smbus->io + addr + offset);
663 data32 = ioread32be(priv->smbus->io + addr + offset);
689 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_STATUS);
693 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_PEC);
695 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_RS_BYTES);
698 writel(command, priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_GW);
735 * Try to acquire the smbus gw lock before any reads of the GW register since
829 priv->smbus->io + MLXBF_I2C_SMBUS_MASTER_FSM);
1121 writel(timer, priv->smbus->io +
1132 writel(timer, priv->smbus->io +
1139 writel(timer, priv->smbus->io + MLXBF_I2C_SMBUS_TIMER_THOLD);
1145 writel(timer, priv->smbus->io +
1150 writel(timer, priv->smbus->io + MLXBF_I2C_SMBUS_TIMER_TSETUP_DATA);
1156 writel(timer, priv->smbus->io + MLXBF_I2C_SMBUS_THIGH_MAX_TBUF);
1159 writel(timer, priv->smbus->io + MLXBF_I2C_SMBUS_SCL_LOW_TIMEOUT);
1573 slave_reg = readl(priv->smbus->io +
1631 writel(slave_reg, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_ADDR_CFG +
1656 slave_reg = readl(priv->smbus->io +
1696 writel(slave_reg, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_ADDR_CFG +
1789 writel(0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_FSM);
1804 writel(0x1, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_READY);
1861 /* Send byte to 'external' smbus master. */
1884 data32 = ioread32be(priv->smbus->io +
1950 writel(control32, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_GW);
1959 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_RS_MASTER_BYTES);
1960 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_PEC);
1961 writel(0x1, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_READY);
1966 /* Receive bytes from 'external' smbus master. */
2006 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_RS_MASTER_BYTES);
2007 writel(0x0, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_PEC);
2008 writel(0x1, priv->smbus->io + MLXBF_I2C_SMBUS_SLAVE_READY);
2043 rw_bytes_reg = readl(priv->smbus->io +
2087 dev_dbg(&adap->dev, "smbus quick, slave 0x%02x\n", addr);
2094 dev_dbg(&adap->dev, "smbus %s byte, slave 0x%02x.\n",
2101 dev_dbg(&adap->dev, "smbus %s byte data at 0x%02x, slave 0x%02x.\n",
2108 dev_dbg(&adap->dev, "smbus %s word data at 0x%02x, slave 0x%02x.\n",
2124 dev_dbg(&adap->dev, "smbus %s block data, %d bytes at 0x%02x, slave 0x%02x.\n",
2338 ret = mlxbf_i2c_init_resource(pdev, &priv->smbus,
2341 dev_err(dev, "Cannot fetch smbus resource info");
2389 dev_err(dev, "failed to initialize smbus master %d",
2430 params = priv->smbus->params;