Lines Matching refs:card
161 waitfor_idle(struct idt77252_dev *card)
171 read_sram(struct idt77252_dev *card, unsigned long addr)
176 spin_lock_irqsave(&card->cmd_lock, flags);
178 waitfor_idle(card);
180 spin_unlock_irqrestore(&card->cmd_lock, flags);
185 write_sram(struct idt77252_dev *card, unsigned long addr, u32 value)
190 (((addr > card->tst[0] + card->tst_size - 2) &&
191 (addr < card->tst[0] + card->tst_size)) ||
192 ((addr > card->tst[1] + card->tst_size - 2) &&
193 (addr < card->tst[1] + card->tst_size)))) {
195 card->name, addr, value);
198 spin_lock_irqsave(&card->cmd_lock, flags);
201 waitfor_idle(card);
202 spin_unlock_irqrestore(&card->cmd_lock, flags);
208 struct idt77252_dev *card = dev;
212 if (!card) {
217 spin_lock_irqsave(&card->cmd_lock, flags);
219 waitfor_idle(card);
221 spin_unlock_irqrestore(&card->cmd_lock, flags);
228 struct idt77252_dev *card = dev;
231 if (!card) {
236 spin_lock_irqsave(&card->cmd_lock, flags);
239 waitfor_idle(card);
240 spin_unlock_irqrestore(&card->cmd_lock, flags);
350 idt77252_read_gp(struct idt77252_dev *card)
362 idt77252_write_gp(struct idt77252_dev *card, u32 value)
372 spin_lock_irqsave(&card->cmd_lock, flags);
373 waitfor_idle(card);
375 spin_unlock_irqrestore(&card->cmd_lock, flags);
379 idt77252_eeprom_read_status(struct idt77252_dev *card)
385 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
388 idt77252_write_gp(card, gp | rdsrtab[i]);
391 idt77252_write_gp(card, gp | SAR_GP_EECS);
398 idt77252_write_gp(card, gp | clktab[j++]);
401 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
403 idt77252_write_gp(card, gp | clktab[j++]);
406 idt77252_write_gp(card, gp | SAR_GP_EECS);
413 idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
419 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
422 idt77252_write_gp(card, gp | rdtab[i]);
425 idt77252_write_gp(card, gp | SAR_GP_EECS);
429 idt77252_write_gp(card, gp | clktab[j++] |
433 idt77252_write_gp(card, gp | clktab[j++] |
439 idt77252_write_gp(card, gp | SAR_GP_EECS);
446 idt77252_write_gp(card, gp | clktab[j++]);
449 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
451 idt77252_write_gp(card, gp | clktab[j++]);
454 idt77252_write_gp(card, gp | SAR_GP_EECS);
461 idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
466 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
469 idt77252_write_gp(card, gp | wrentab[i]);
472 idt77252_write_gp(card, gp | SAR_GP_EECS);
476 idt77252_write_gp(card, gp | wrtab[i]);
479 idt77252_write_gp(card, gp | SAR_GP_EECS);
483 idt77252_write_gp(card, gp | clktab[j++] |
487 idt77252_write_gp(card, gp | clktab[j++] |
493 idt77252_write_gp(card, gp | SAR_GP_EECS);
497 idt77252_write_gp(card, gp | clktab[j++] |
501 idt77252_write_gp(card, gp | clktab[j++] |
507 idt77252_write_gp(card, gp | SAR_GP_EECS);
512 idt77252_eeprom_init(struct idt77252_dev *card)
516 gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
518 idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
520 idt77252_write_gp(card, gp | SAR_GP_EECS);
522 idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
524 idt77252_write_gp(card, gp | SAR_GP_EECS);
532 dump_tct(struct idt77252_dev *card, int index)
537 tct = (unsigned long) (card->tct_base + index * SAR_SRAM_TCT_SIZE);
539 printk("%s: TCT %x:", card->name, index);
541 printk(" %08x", read_sram(card, tct + i));
547 idt77252_tx_dump(struct idt77252_dev *card)
554 for (i = 0; i < card->tct_size; i++) {
555 vc = card->vcs[i];
568 printk("%s: Connection %d:\n", card->name, vc->index);
569 dump_tct(card, vc->index);
582 sb_pool_add(struct idt77252_dev *card, struct sk_buff *skb, int queue)
584 struct sb_pool *pool = &card->sbpool[queue];
602 sb_pool_remove(struct idt77252_dev *card, struct sk_buff *skb)
617 card->sbpool[queue].skb[index] = NULL;
621 sb_pool_skb(struct idt77252_dev *card, u32 handle)
633 return card->sbpool[queue].skb[index];
637 alloc_scq(struct idt77252_dev *card, int class)
644 scq->base = dma_alloc_coherent(&card->pcidev->dev, SCQ_SIZE,
668 free_scq(struct idt77252_dev *card, struct scq_info *scq)
673 dma_free_coherent(&card->pcidev->dev, SCQ_SIZE,
677 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
688 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
703 push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
710 TXPRINTK("%s: SCQ: next 0x%p\n", card->name, scq->next);
756 write_sram(card, scq->scd,
771 card->name, atomic_read(&scq->used),
772 read_sram(card, scq->scd + 1), scq->next);
779 card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
781 idt77252_tx_dump(card);
791 drain_scq(struct idt77252_dev *card, struct vc_map *vc)
798 card->name, atomic_read(&scq->used), scq->next);
802 TXPRINTK("%s: freeing skb at %p.\n", card->name, skb);
804 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
821 if (push_on_scq(card, vc, skb)) {
830 queue_skb(struct idt77252_dev *card, struct vc_map *vc,
841 printk("%s: invalid skb->len (%d)\n", card->name, skb->len);
846 card->name, skb->len);
853 IDT77252_PRV_PADDR(skb) = dma_map_single(&card->pcidev->dev, skb->data,
868 vc = card->vcs[0];
874 printk("%s: Trying to transmit on reserved VC\n", card->name);
909 printk("%s: Traffic type not supported.\n", card->name);
919 if (push_on_scq(card, vc, skb)) {
929 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
935 get_free_scd(struct idt77252_dev *card, struct vc_map *vc)
939 for (i = 0; i < card->scd_size; i++) {
940 if (!card->scd2vc[i]) {
941 card->scd2vc[i] = vc;
943 return card->scd_base + i * SAR_SRAM_SCD_SIZE;
950 fill_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
952 write_sram(card, scq->scd, scq->paddr);
953 write_sram(card, scq->scd + 1, 0x00000000);
954 write_sram(card, scq->scd + 2, 0xffffffff);
955 write_sram(card, scq->scd + 3, 0x00000000);
959 clear_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
971 init_rsq(struct idt77252_dev *card)
975 card->rsq.base = dma_alloc_coherent(&card->pcidev->dev, RSQSIZE,
976 &card->rsq.paddr, GFP_KERNEL);
977 if (card->rsq.base == NULL) {
978 printk("%s: can't allocate RSQ.\n", card->name);
982 card->rsq.last = card->rsq.base + RSQ_NUM_ENTRIES - 1;
983 card->rsq.next = card->rsq.last;
984 for (rsqe = card->rsq.base; rsqe <= card->rsq.last; rsqe++)
987 writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
989 writel(card->rsq.paddr, SAR_REG_RSQB);
991 IPRINTK("%s: RSQ base at 0x%lx (0x%x).\n", card->name,
992 (unsigned long) card->rsq.base,
995 card->name,
1004 deinit_rsq(struct idt77252_dev *card)
1006 dma_free_coherent(&card->pcidev->dev, RSQSIZE,
1007 card->rsq.base, card->rsq.paddr);
1011 dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe)
1025 card->name);
1029 skb = sb_pool_skb(card, le32_to_cpu(rsqe->word_2));
1032 card->name, __func__,
1043 card->name, vpi, vci, skb, skb->data);
1045 if ((vpi >= (1 << card->vpibits)) || (vci != (vci & card->vcimask))) {
1047 card->name, vpi, vci);
1048 recycle_rx_skb(card, skb);
1052 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1055 card->name, vpi, vci);
1056 recycle_rx_skb(card, skb);
1062 dma_sync_single_for_cpu(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1076 card->name);
1082 card->name);
1104 recycle_rx_skb(card, skb);
1109 card->name, vcc->qos.aal);
1110 recycle_rx_skb(card, skb);
1129 RXPRINTK("%s: PDU has %d bytes.\n", card->name, len);
1134 card->name, len, rpp->len, readl(SAR_REG_CDC));
1135 recycle_rx_pool_skb(card, rpp);
1140 RXPRINTK("%s: AAL5 CRC error.\n", card->name);
1141 recycle_rx_pool_skb(card, rpp);
1151 card->name);
1152 recycle_rx_pool_skb(card, rpp);
1157 recycle_rx_pool_skb(card, rpp);
1164 recycle_rx_pool_skb(card, rpp);
1176 flush_rx_pool(card, rpp);
1179 recycle_rx_skb(card, skb);
1183 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1186 sb_pool_remove(card, skb);
1197 add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1199 add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1201 add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
1203 add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
1209 idt77252_rx(struct idt77252_dev *card)
1213 if (card->rsq.next == card->rsq.last)
1214 rsqe = card->rsq.base;
1216 rsqe = card->rsq.next + 1;
1219 RXPRINTK("%s: no entry in RSQ.\n", card->name);
1224 dequeue_rx(card, rsqe);
1226 card->rsq.next = rsqe;
1227 if (card->rsq.next == card->rsq.last)
1228 rsqe = card->rsq.base;
1230 rsqe = card->rsq.next + 1;
1233 writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
1238 idt77252_rx_raw(struct idt77252_dev *card)
1246 if (card->raw_cell_head == NULL) {
1247 u32 handle = le32_to_cpu(*(card->raw_cell_hnd + 1));
1248 card->raw_cell_head = sb_pool_skb(card, handle);
1251 queue = card->raw_cell_head;
1258 dma_sync_single_for_cpu(&card->pcidev->dev, IDT77252_PRV_PADDR(queue),
1276 card->name, (header >> 28) & 0x000f,
1287 if (vpi >= (1<<card->vpibits) || vci >= (1<<card->vcibits)) {
1289 card->name, vpi, vci);
1293 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1296 card->name, vpi, vci);
1304 card->name, vpi, vci);
1311 card->name);
1318 card->name);
1345 next = sb_pool_skb(card, handle);
1346 recycle_rx_skb(card, queue);
1349 card->raw_cell_head = next;
1350 queue = card->raw_cell_head;
1351 dma_sync_single_for_cpu(&card->pcidev->dev,
1357 card->raw_cell_head = NULL;
1359 card->name);
1374 init_tsq(struct idt77252_dev *card)
1378 card->tsq.base = dma_alloc_coherent(&card->pcidev->dev, RSQSIZE,
1379 &card->tsq.paddr, GFP_KERNEL);
1380 if (card->tsq.base == NULL) {
1381 printk("%s: can't allocate TSQ.\n", card->name);
1385 card->tsq.last = card->tsq.base + TSQ_NUM_ENTRIES - 1;
1386 card->tsq.next = card->tsq.last;
1387 for (tsqe = card->tsq.base; tsqe <= card->tsq.last; tsqe++)
1390 writel(card->tsq.paddr, SAR_REG_TSQB);
1391 writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
1398 deinit_tsq(struct idt77252_dev *card)
1400 dma_free_coherent(&card->pcidev->dev, TSQSIZE,
1401 card->tsq.base, card->tsq.paddr);
1405 idt77252_tx(struct idt77252_dev *card)
1412 if (card->tsq.next == card->tsq.last)
1413 tsqe = card->tsq.base;
1415 tsqe = card->tsq.next + 1;
1418 card->tsq.base, card->tsq.next, card->tsq.last);
1436 TXPRINTK("%s: Timer RollOver detected.\n", card->name);
1446 card->name,
1452 vc = card->vcs[conn & 0x1fff];
1455 card->name, conn & 0x1fff);
1460 card->name, vc->index);
1469 vc = card->vcs[conn & 0x1fff];
1472 card->name,
1477 drain_scq(card, vc);
1487 if (vpi >= (1 << card->vpibits) ||
1488 vci >= (1 << card->vcibits)) {
1491 card->name, vpi, vci);
1495 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1499 card->name, vpi, vci);
1503 drain_scq(card, vc);
1509 card->tsq.next = tsqe;
1510 if (card->tsq.next == card->tsq.last)
1511 tsqe = card->tsq.base;
1513 tsqe = card->tsq.next + 1;
1516 card->tsq.base, card->tsq.next, card->tsq.last);
1522 writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
1526 card->index, readl(SAR_REG_TSQH),
1527 readl(SAR_REG_TSQT), card->tsq.next);
1534 struct idt77252_dev *card = from_timer(card, t, tst_timer);
1540 spin_lock_irqsave(&card->tst_lock, flags);
1542 base = card->tst[card->tst_index];
1543 idle = card->tst[card->tst_index ^ 1];
1545 if (test_bit(TST_SWITCH_WAIT, &card->tst_state)) {
1546 jump = base + card->tst_size - 2;
1549 if ((pc ^ idle) & ~(card->tst_size - 1)) {
1550 mod_timer(&card->tst_timer, jiffies + 1);
1554 clear_bit(TST_SWITCH_WAIT, &card->tst_state);
1556 card->tst_index ^= 1;
1557 write_sram(card, jump, TSTE_OPC_JMP | (base << 2));
1559 base = card->tst[card->tst_index];
1560 idle = card->tst[card->tst_index ^ 1];
1562 for (e = 0; e < card->tst_size - 2; e++) {
1563 if (card->soft_tst[e].tste & TSTE_PUSH_IDLE) {
1564 write_sram(card, idle + e,
1565 card->soft_tst[e].tste & TSTE_MASK);
1566 card->soft_tst[e].tste &= ~(TSTE_PUSH_IDLE);
1571 if (test_and_clear_bit(TST_SWITCH_PENDING, &card->tst_state)) {
1573 for (e = 0; e < card->tst_size - 2; e++) {
1574 if (card->soft_tst[e].tste & TSTE_PUSH_ACTIVE) {
1575 write_sram(card, idle + e,
1576 card->soft_tst[e].tste & TSTE_MASK);
1577 card->soft_tst[e].tste &= ~(TSTE_PUSH_ACTIVE);
1578 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1582 jump = base + card->tst_size - 2;
1584 write_sram(card, jump, TSTE_OPC_NULL);
1585 set_bit(TST_SWITCH_WAIT, &card->tst_state);
1587 mod_timer(&card->tst_timer, jiffies + 1);
1591 spin_unlock_irqrestore(&card->tst_lock, flags);
1595 __fill_tst(struct idt77252_dev *card, struct vc_map *vc,
1603 avail = card->tst_size - 2;
1605 if (card->soft_tst[e].vc == NULL)
1609 printk("%s: No free TST entries found\n", card->name);
1614 card->name, vc ? vc->index : -1, e);
1622 idle = card->tst[card->tst_index ^ 1];
1628 if ((cl >= avail) && (card->soft_tst[e].vc == NULL)) {
1630 card->soft_tst[e].vc = vc;
1632 card->soft_tst[e].vc = (void *)-1;
1634 card->soft_tst[e].tste = data;
1635 if (timer_pending(&card->tst_timer))
1636 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1638 write_sram(card, idle + e, data);
1639 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1642 cl -= card->tst_size;
1655 fill_tst(struct idt77252_dev *card, struct vc_map *vc, int n, unsigned int opc)
1660 spin_lock_irqsave(&card->tst_lock, flags);
1662 res = __fill_tst(card, vc, n, opc);
1664 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1665 if (!timer_pending(&card->tst_timer))
1666 mod_timer(&card->tst_timer, jiffies + 1);
1668 spin_unlock_irqrestore(&card->tst_lock, flags);
1673 __clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1678 idle = card->tst[card->tst_index ^ 1];
1680 for (e = 0; e < card->tst_size - 2; e++) {
1681 if (card->soft_tst[e].vc == vc) {
1682 card->soft_tst[e].vc = NULL;
1684 card->soft_tst[e].tste = TSTE_OPC_VAR;
1685 if (timer_pending(&card->tst_timer))
1686 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1688 write_sram(card, idle + e, TSTE_OPC_VAR);
1689 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1698 clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1703 spin_lock_irqsave(&card->tst_lock, flags);
1705 res = __clear_tst(card, vc);
1707 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1708 if (!timer_pending(&card->tst_timer))
1709 mod_timer(&card->tst_timer, jiffies + 1);
1711 spin_unlock_irqrestore(&card->tst_lock, flags);
1716 change_tst(struct idt77252_dev *card, struct vc_map *vc,
1722 spin_lock_irqsave(&card->tst_lock, flags);
1724 __clear_tst(card, vc);
1725 res = __fill_tst(card, vc, n, opc);
1727 set_bit(TST_SWITCH_PENDING, &card->tst_state);
1728 if (!timer_pending(&card->tst_timer))
1729 mod_timer(&card->tst_timer, jiffies + 1);
1731 spin_unlock_irqrestore(&card->tst_lock, flags);
1737 set_tct(struct idt77252_dev *card, struct vc_map *vc)
1741 tct = (unsigned long) (card->tct_base + vc->index * SAR_SRAM_TCT_SIZE);
1746 card->name, tct, vc->scq->scd);
1748 write_sram(card, tct + 0, TCT_CBR | vc->scq->scd);
1749 write_sram(card, tct + 1, 0);
1750 write_sram(card, tct + 2, 0);
1751 write_sram(card, tct + 3, 0);
1752 write_sram(card, tct + 4, 0);
1753 write_sram(card, tct + 5, 0);
1754 write_sram(card, tct + 6, 0);
1755 write_sram(card, tct + 7, 0);
1760 card->name, tct, vc->scq->scd);
1762 write_sram(card, tct + 0, TCT_UBR | vc->scq->scd);
1763 write_sram(card, tct + 1, 0);
1764 write_sram(card, tct + 2, TCT_TSIF);
1765 write_sram(card, tct + 3, TCT_HALT | TCT_IDLE);
1766 write_sram(card, tct + 4, 0);
1767 write_sram(card, tct + 5, vc->init_er);
1768 write_sram(card, tct + 6, 0);
1769 write_sram(card, tct + 7, TCT_FLAG_UBR);
1788 idt77252_fbq_level(struct idt77252_dev *card, int queue)
1794 idt77252_fbq_full(struct idt77252_dev *card, int queue)
1800 push_rx_skb(struct idt77252_dev *card, struct sk_buff *skb, int queue)
1829 if (idt77252_fbq_full(card, queue))
1837 spin_lock_irqsave(&card->cmd_lock, flags);
1838 writel(handle, card->fbq[queue]);
1839 writel(addr, card->fbq[queue]);
1840 spin_unlock_irqrestore(&card->cmd_lock, flags);
1846 add_rx_skb(struct idt77252_dev *card, int queue,
1858 if (sb_pool_add(card, skb, queue)) {
1863 paddr = dma_map_single(&card->pcidev->dev, skb->data,
1868 if (push_rx_skb(card, skb, queue)) {
1877 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1881 card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
1889 recycle_rx_skb(struct idt77252_dev *card, struct sk_buff *skb)
1894 dma_sync_single_for_device(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1898 err = push_rx_skb(card, skb, POOL_QUEUE(handle));
1900 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1903 sb_pool_remove(card, skb);
1909 flush_rx_pool(struct idt77252_dev *card, struct rx_pool *rpp)
1916 recycle_rx_pool_skb(struct idt77252_dev *card, struct rx_pool *rpp)
1921 recycle_rx_skb(card, skb);
1923 flush_rx_pool(card, rpp);
1948 struct idt77252_dev *card = dev->dev_data;
1953 printk("%s: NULL connection in send().\n", card->name);
1959 printk("%s: Trying to transmit on a non-tx VC.\n", card->name);
1971 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
1978 printk("%s: No scatter-gather yet.\n", card->name);
1985 err = queue_skb(card, vc, skb, oam);
2004 struct idt77252_dev *card = dev->dev_data;
2009 printk("%s: Out of memory in send_oam().\n", card->name);
2066 idt77252_rate_logindex(struct idt77252_dev *card, int pcr)
2081 struct idt77252_dev *card = vc->card;
2101 lacr = idt77252_rate_logindex(card, cps);
2139 idt77252_init_cbr(struct idt77252_dev *card, struct vc_map *vc,
2149 card->name);
2154 tst_free = card->tst_free;
2162 TXPRINTK("%s: CBR target cell rate = %d\n", card->name, tcra);
2164 tmpl = (unsigned long) tcra * ((unsigned long) card->tst_size - 2);
2165 modl = tmpl % (unsigned long)card->utopia_pcr;
2167 tst_entries = (int) (tmpl / card->utopia_pcr);
2174 printk("%s: no CBR bandwidth free.\n", card->name);
2181 card->name);
2186 printk("%s: not enough CBR bandwidth free.\n", card->name);
2192 card->tst_free = tst_free - tst_entries;
2198 card->name, tst_used, tst_entries);
2199 change_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2203 OPRINTK("%s: setting %d entries in TST.\n", card->name, tst_entries);
2204 fill_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2209 idt77252_init_ubr(struct idt77252_dev *card, struct vc_map *vc,
2229 tcr = card->link_pcr;
2234 vc->init_er = idt77252_rate_logindex(card, tcr);
2245 idt77252_init_tx(struct idt77252_dev *card, struct vc_map *vc,
2268 vc->scq = alloc_scq(card, vc->class);
2270 printk("%s: can't get SCQ.\n", card->name);
2274 vc->scq->scd = get_free_scd(card, vc);
2276 printk("%s: no SCD available.\n", card->name);
2277 free_scq(card, vc->scq);
2281 fill_scd(card, vc->scq, vc->class);
2283 if (set_tct(card, vc)) {
2285 card->name, qos->txtp.traffic_class);
2287 card->scd2vc[vc->scd_index] = NULL;
2288 free_scq(card, vc->scq);
2294 error = idt77252_init_cbr(card, vc, vcc, qos);
2296 card->scd2vc[vc->scd_index] = NULL;
2297 free_scq(card, vc->scq);
2306 error = idt77252_init_ubr(card, vc, vcc, qos);
2308 card->scd2vc[vc->scd_index] = NULL;
2309 free_scq(card, vc->scq);
2323 idt77252_init_rx(struct idt77252_dev *card, struct vc_map *vc,
2339 flush_rx_pool(card, &vc->rcv.rx_pool);
2373 addr = card->rct_base + (vc->index << 2);
2375 OPRINTK("%s: writing RCT at 0x%lx\n", card->name, addr);
2376 write_sram(card, addr, rcte);
2378 spin_lock_irqsave(&card->cmd_lock, flags);
2380 waitfor_idle(card);
2381 spin_unlock_irqrestore(&card->cmd_lock, flags);
2390 struct idt77252_dev *card = dev->dev_data;
2401 if (vpi >= (1 << card->vpibits)) {
2402 printk("%s: unsupported VPI: %d\n", card->name, vpi);
2406 if (vci >= (1 << card->vcibits)) {
2407 printk("%s: unsupported VCI: %d\n", card->name, vci);
2413 mutex_lock(&card->mutex);
2415 OPRINTK("%s: opening vpi.vci: %d.%d\n", card->name, vpi, vci);
2423 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
2424 mutex_unlock(&card->mutex);
2428 index = VPCI2VC(card, vpi, vci);
2429 if (!card->vcs[index]) {
2430 card->vcs[index] = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2431 if (!card->vcs[index]) {
2432 printk("%s: can't alloc vc in open()\n", card->name);
2433 mutex_unlock(&card->mutex);
2436 card->vcs[index]->card = card;
2437 card->vcs[index]->index = index;
2439 spin_lock_init(&card->vcs[index]->lock);
2441 vc = card->vcs[index];
2446 card->name, vc->index, vcc->vpi, vcc->vci,
2460 printk("%s: %s vci already in use.\n", card->name,
2462 mutex_unlock(&card->mutex);
2467 error = idt77252_init_tx(card, vc, vcc, &vcc->qos);
2469 mutex_unlock(&card->mutex);
2475 error = idt77252_init_rx(card, vc, vcc, &vcc->qos);
2477 mutex_unlock(&card->mutex);
2484 mutex_unlock(&card->mutex);
2492 struct idt77252_dev *card = dev->dev_data;
2498 mutex_lock(&card->mutex);
2501 card->name, vc->index, vcc->vpi, vcc->vci);
2515 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2517 spin_lock_irqsave(&card->cmd_lock, flags);
2519 waitfor_idle(card);
2520 spin_unlock_irqrestore(&card->cmd_lock, flags);
2524 card->name);
2526 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2551 card->name, atomic_read(&vc->scq->used));
2557 clear_scd(card, vc->scq, vc->class);
2560 clear_tst(card, vc);
2561 card->tst_free += vc->ntste;
2565 card->scd2vc[vc->scd_index] = NULL;
2566 free_scq(card, vc->scq);
2569 mutex_unlock(&card->mutex);
2576 struct idt77252_dev *card = dev->dev_data;
2580 mutex_lock(&card->mutex);
2584 error = idt77252_init_tx(card, vc, vcc, qos);
2590 error = idt77252_init_cbr(card, vc, vcc, qos);
2596 error = idt77252_init_ubr(card, vc, vcc, qos);
2616 error = idt77252_init_rx(card, vc, vcc, qos);
2626 mutex_unlock(&card->mutex);
2633 struct idt77252_dev *card = dev->dev_data;
2640 return sprintf(page, "TSIF: %lu\n", card->irqstat[15]);
2642 return sprintf(page, "TXICP: %lu\n", card->irqstat[14]);
2644 return sprintf(page, "TSQF: %lu\n", card->irqstat[12]);
2646 return sprintf(page, "TMROF: %lu\n", card->irqstat[11]);
2648 return sprintf(page, "PHYI: %lu\n", card->irqstat[10]);
2650 return sprintf(page, "FBQ3A: %lu\n", card->irqstat[8]);
2652 return sprintf(page, "FBQ2A: %lu\n", card->irqstat[7]);
2654 return sprintf(page, "RSQF: %lu\n", card->irqstat[6]);
2656 return sprintf(page, "EPDU: %lu\n", card->irqstat[5]);
2658 return sprintf(page, "RAWCF: %lu\n", card->irqstat[4]);
2660 return sprintf(page, "FBQ1A: %lu\n", card->irqstat[3]);
2662 return sprintf(page, "FBQ0A: %lu\n", card->irqstat[2]);
2664 return sprintf(page, "RSQAF: %lu\n", card->irqstat[1]);
2668 for (i = 0; i < card->tct_size; i++) {
2674 vc = card->vcs[i];
2688 tct = (unsigned long) (card->tct_base + i * SAR_SRAM_TCT_SIZE);
2691 p += sprintf(p, " %08x", read_sram(card, tct + i));
2705 idt77252_collect_stat(struct idt77252_dev *card)
2716 struct idt77252_dev *card = dev_id;
2723 if (test_and_set_bit(IDT77252_BIT_INTERRUPT, &card->flags)) {
2724 printk("%s: Re-entering irq_handler()\n", card->name);
2731 INTPRINTK("%s: TSIF\n", card->name);
2732 card->irqstat[15]++;
2733 idt77252_tx(card);
2736 INTPRINTK("%s: TXICP\n", card->name);
2737 card->irqstat[14]++;
2739 idt77252_tx_dump(card);
2743 INTPRINTK("%s: TSQF\n", card->name);
2744 card->irqstat[12]++;
2745 idt77252_tx(card);
2748 INTPRINTK("%s: TMROF\n", card->name);
2749 card->irqstat[11]++;
2750 idt77252_collect_stat(card);
2754 INTPRINTK("%s: EPDU\n", card->name);
2755 card->irqstat[5]++;
2756 idt77252_rx(card);
2759 INTPRINTK("%s: RSQAF\n", card->name);
2760 card->irqstat[1]++;
2761 idt77252_rx(card);
2764 INTPRINTK("%s: RSQF\n", card->name);
2765 card->irqstat[6]++;
2766 idt77252_rx(card);
2769 INTPRINTK("%s: RAWCF\n", card->name);
2770 card->irqstat[4]++;
2771 idt77252_rx_raw(card);
2775 INTPRINTK("%s: PHYI", card->name);
2776 card->irqstat[10]++;
2777 if (card->atmdev->phy && card->atmdev->phy->interrupt)
2778 card->atmdev->phy->interrupt(card->atmdev);
2786 INTPRINTK("%s: FBQA: %04x\n", card->name, stat);
2789 card->irqstat[2]++;
2791 card->irqstat[3]++;
2793 card->irqstat[7]++;
2795 card->irqstat[8]++;
2797 schedule_work(&card->tqueue);
2801 clear_bit(IDT77252_BIT_INTERRUPT, &card->flags);
2808 struct idt77252_dev *card =
2817 add_rx_skb(card, 0, SAR_FB_SIZE_0, 32);
2823 add_rx_skb(card, 1, SAR_FB_SIZE_1, 32);
2829 add_rx_skb(card, 2, SAR_FB_SIZE_2, 32);
2835 add_rx_skb(card, 3, SAR_FB_SIZE_3, 32);
2848 open_card_oam(struct idt77252_dev *card)
2857 for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2859 index = VPCI2VC(card, vpi, vci);
2863 printk("%s: can't alloc vc\n", card->name);
2867 card->vcs[index] = vc;
2869 flush_rx_pool(card, &vc->rcv.rx_pool);
2876 addr = card->rct_base + (vc->index << 2);
2877 write_sram(card, addr, rcte);
2879 spin_lock_irqsave(&card->cmd_lock, flags);
2882 waitfor_idle(card);
2883 spin_unlock_irqrestore(&card->cmd_lock, flags);
2891 close_card_oam(struct idt77252_dev *card)
2899 for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2901 index = VPCI2VC(card, vpi, vci);
2902 vc = card->vcs[index];
2904 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2906 spin_lock_irqsave(&card->cmd_lock, flags);
2909 waitfor_idle(card);
2910 spin_unlock_irqrestore(&card->cmd_lock, flags);
2915 card->name);
2917 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2925 open_card_ubr0(struct idt77252_dev *card)
2931 printk("%s: can't alloc vc\n", card->name);
2934 card->vcs[0] = vc;
2937 vc->scq = alloc_scq(card, vc->class);
2939 printk("%s: can't get SCQ.\n", card->name);
2940 kfree(card->vcs[0]);
2941 card->vcs[0] = NULL;
2945 card->scd2vc[0] = vc;
2947 vc->scq->scd = card->scd_base;
2949 fill_scd(card, vc->scq, vc->class);
2951 write_sram(card, card->tct_base + 0, TCT_UBR | card->scd_base);
2952 write_sram(card, card->tct_base + 1, 0);
2953 write_sram(card, card->tct_base + 2, 0);
2954 write_sram(card, card->tct_base + 3, 0);
2955 write_sram(card, card->tct_base + 4, 0);
2956 write_sram(card, card->tct_base + 5, 0);
2957 write_sram(card, card->tct_base + 6, 0);
2958 write_sram(card, card->tct_base + 7, TCT_FLAG_UBR);
2966 close_card_ubr0(struct idt77252_dev *card)
2968 struct vc_map *vc = card->vcs[0];
2970 free_scq(card, vc->scq);
2975 idt77252_dev_open(struct idt77252_dev *card)
2979 if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
2980 printk("%s: SAR not yet initialized.\n", card->name);
3004 if (open_card_oam(card)) {
3005 printk("%s: Error initializing OAM.\n", card->name);
3009 if (open_card_ubr0(card)) {
3010 printk("%s: Error initializing UBR0.\n", card->name);
3014 IPRINTK("%s: opened IDT77252 ABR SAR.\n", card->name);
3020 struct idt77252_dev *card = dev->dev_data;
3023 close_card_ubr0(card);
3024 close_card_oam(card);
3040 DIPRINTK("%s: closed IDT77252 ABR SAR.\n", card->name);
3052 deinit_card(struct idt77252_dev *card)
3057 if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3058 printk("%s: SAR not yet initialized.\n", card->name);
3061 DIPRINTK("idt77252: deinitialize card %u\n", card->index);
3065 if (card->atmdev)
3066 atm_dev_deregister(card->atmdev);
3070 skb = card->sbpool[i].skb[j];
3072 dma_unmap_single(&card->pcidev->dev,
3077 card->sbpool[i].skb[j] = NULL;
3083 vfree(card->soft_tst);
3085 vfree(card->scd2vc);
3087 vfree(card->vcs);
3089 if (card->raw_cell_hnd) {
3090 dma_free_coherent(&card->pcidev->dev, 2 * sizeof(u32),
3091 card->raw_cell_hnd, card->raw_cell_paddr);
3094 if (card->rsq.base) {
3095 DIPRINTK("%s: Release RSQ ...\n", card->name);
3096 deinit_rsq(card);
3099 if (card->tsq.base) {
3100 DIPRINTK("%s: Release TSQ ...\n", card->name);
3101 deinit_tsq(card);
3105 free_irq(card->pcidev->irq, card);
3108 if (card->fbq[i])
3109 iounmap(card->fbq[i]);
3112 if (card->membase)
3113 iounmap(card->membase);
3115 clear_bit(IDT77252_BIT_INIT, &card->flags);
3116 DIPRINTK("%s: Card deinitialized.\n", card->name);
3120 static void init_sram(struct idt77252_dev *card)
3124 for (i = 0; i < card->sramsize; i += 4)
3125 write_sram(card, (i >> 2), 0);
3127 /* set SRAM layout for THIS card */
3128 if (card->sramsize == (512 * 1024)) {
3129 card->tct_base = SAR_SRAM_TCT_128_BASE;
3130 card->tct_size = (SAR_SRAM_TCT_128_TOP - card->tct_base + 1)
3132 card->rct_base = SAR_SRAM_RCT_128_BASE;
3133 card->rct_size = (SAR_SRAM_RCT_128_TOP - card->rct_base + 1)
3135 card->rt_base = SAR_SRAM_RT_128_BASE;
3136 card->scd_base = SAR_SRAM_SCD_128_BASE;
3137 card->scd_size = (SAR_SRAM_SCD_128_TOP - card->scd_base + 1)
3139 card->tst[0] = SAR_SRAM_TST1_128_BASE;
3140 card->tst[1] = SAR_SRAM_TST2_128_BASE;
3141 card->tst_size = SAR_SRAM_TST1_128_TOP - card->tst[0] + 1;
3142 card->abrst_base = SAR_SRAM_ABRSTD_128_BASE;
3143 card->abrst_size = SAR_ABRSTD_SIZE_8K;
3144 card->fifo_base = SAR_SRAM_FIFO_128_BASE;
3145 card->fifo_size = SAR_RXFD_SIZE_32K;
3147 card->tct_base = SAR_SRAM_TCT_32_BASE;
3148 card->tct_size = (SAR_SRAM_TCT_32_TOP - card->tct_base + 1)
3150 card->rct_base = SAR_SRAM_RCT_32_BASE;
3151 card->rct_size = (SAR_SRAM_RCT_32_TOP - card->rct_base + 1)
3153 card->rt_base = SAR_SRAM_RT_32_BASE;
3154 card->scd_base = SAR_SRAM_SCD_32_BASE;
3155 card->scd_size = (SAR_SRAM_SCD_32_TOP - card->scd_base + 1)
3157 card->tst[0] = SAR_SRAM_TST1_32_BASE;
3158 card->tst[1] = SAR_SRAM_TST2_32_BASE;
3159 card->tst_size = (SAR_SRAM_TST1_32_TOP - card->tst[0] + 1);
3160 card->abrst_base = SAR_SRAM_ABRSTD_32_BASE;
3161 card->abrst_size = SAR_ABRSTD_SIZE_1K;
3162 card->fifo_base = SAR_SRAM_FIFO_32_BASE;
3163 card->fifo_size = SAR_RXFD_SIZE_4K;
3167 for (i = 0; i < card->tct_size; i++) {
3168 write_sram(card, i * SAR_SRAM_TCT_SIZE + 0, 0);
3169 write_sram(card, i * SAR_SRAM_TCT_SIZE + 1, 0);
3170 write_sram(card, i * SAR_SRAM_TCT_SIZE + 2, 0);
3171 write_sram(card, i * SAR_SRAM_TCT_SIZE + 3, 0);
3172 write_sram(card, i * SAR_SRAM_TCT_SIZE + 4, 0);
3173 write_sram(card, i * SAR_SRAM_TCT_SIZE + 5, 0);
3174 write_sram(card, i * SAR_SRAM_TCT_SIZE + 6, 0);
3175 write_sram(card, i * SAR_SRAM_TCT_SIZE + 7, 0);
3179 for (i = 0; i < card->rct_size; i++) {
3180 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE,
3182 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 1,
3184 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 2,
3186 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 3,
3197 write_sram(card, card->rt_base + i, log_to_rate[i]);
3207 write_sram(card, card->rt_base + 256 + i, tmp);
3216 write_sram(card, card->rt_base + 512 + i, tmp);
3224 write_sram(card, card->rt_base + 640 + i, tmp);
3228 IPRINTK("%s: initialize rate table ...\n", card->name);
3229 writel(card->rt_base << 2, SAR_REG_RTBL);
3232 IPRINTK("%s: initialize TST ...\n", card->name);
3233 card->tst_free = card->tst_size - 2; /* last two are jumps */
3235 for (i = card->tst[0]; i < card->tst[0] + card->tst_size - 2; i++)
3236 write_sram(card, i, TSTE_OPC_VAR);
3237 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3239 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3241 for (i = card->tst[1]; i < card->tst[1] + card->tst_size - 2; i++)
3242 write_sram(card, i, TSTE_OPC_VAR);
3243 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3245 write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3248 card->tst_index = 0;
3249 writel(card->tst[0] << 2, SAR_REG_TSTB);
3252 IPRINTK("%s: initialize ABRSTD ...\n", card->name);
3253 writel(card->abrst_size | (card->abrst_base << 2),
3256 IPRINTK("%s: initialize receive fifo ...\n", card->name);
3257 writel(card->fifo_size | (card->fifo_base << 2),
3260 IPRINTK("%s: SRAM initialization complete.\n", card->name);
3265 struct idt77252_dev *card = dev->dev_data;
3266 struct pci_dev *pcidev = card->pcidev;
3278 if (test_bit(IDT77252_BIT_INIT, &card->flags)) {
3288 IPRINTK("%s: Checking PCI retries.\n", card->name);
3290 printk("%s: can't read PCI retry timeout.\n", card->name);
3291 deinit_card(card);
3296 card->name, pci_byte);
3299 card->name);
3300 deinit_card(card);
3304 IPRINTK("%s: Checking PCI TRDY.\n", card->name);
3306 printk("%s: can't read PCI TRDY timeout.\n", card->name);
3307 deinit_card(card);
3312 card->name, pci_byte);
3314 printk("%s: can't set PCI TRDY timeout.\n", card->name);
3315 deinit_card(card);
3321 printk("%s: resetting timer overflow.\n", card->name);
3324 IPRINTK("%s: Request IRQ ... ", card->name);
3326 card->name, card) != 0) {
3327 printk("%s: can't allocate IRQ.\n", card->name);
3328 deinit_card(card);
3337 IPRINTK("%s: Initializing SRAM\n", card->name);
3348 if (card->sramsize == (512 * 1024))
3371 init_sram(card);
3377 if (0 != init_tsq(card)) {
3378 deinit_card(card);
3382 if (0 != init_rsq(card)) {
3383 deinit_card(card);
3387 card->vpibits = vpibits;
3388 if (card->sramsize == (512 * 1024)) {
3389 card->vcibits = 10 - card->vpibits;
3391 card->vcibits = 9 - card->vpibits;
3394 card->vcimask = 0;
3395 for (k = 0, i = 1; k < card->vcibits; k++) {
3396 card->vcimask |= i;
3400 IPRINTK("%s: Setting VPI/VCI mask to zero.\n", card->name);
3407 card->raw_cell_hnd = dma_alloc_coherent(&card->pcidev->dev,
3409 &card->raw_cell_paddr,
3411 if (!card->raw_cell_hnd) {
3412 printk("%s: memory allocation failure.\n", card->name);
3413 deinit_card(card);
3416 writel(card->raw_cell_paddr, SAR_REG_RAWHND);
3417 IPRINTK("%s: raw cell handle is at 0x%p.\n", card->name,
3418 card->raw_cell_hnd);
3420 size = sizeof(struct vc_map *) * card->tct_size;
3421 IPRINTK("%s: allocate %d byte for VC map.\n", card->name, size);
3422 card->vcs = vzalloc(size);
3423 if (!card->vcs) {
3424 printk("%s: memory allocation failure.\n", card->name);
3425 deinit_card(card);
3429 size = sizeof(struct vc_map *) * card->scd_size;
3431 card->name, size);
3432 card->scd2vc = vzalloc(size);
3433 if (!card->scd2vc) {
3434 printk("%s: memory allocation failure.\n", card->name);
3435 deinit_card(card);
3439 size = sizeof(struct tst_info) * (card->tst_size - 2);
3441 card->name, size);
3442 card->soft_tst = vmalloc(size);
3443 if (!card->soft_tst) {
3444 printk("%s: memory allocation failure.\n", card->name);
3445 deinit_card(card);
3448 for (i = 0; i < card->tst_size - 2; i++) {
3449 card->soft_tst[i].tste = TSTE_OPC_VAR;
3450 card->soft_tst[i].vc = NULL;
3454 printk("%s: No LT device defined.\n", card->name);
3455 deinit_card(card);
3459 printk("%s: LT had no IOCTL function defined.\n", card->name);
3460 deinit_card(card);
3477 card->link_pcr = (linkrate / 8 / 53);
3479 card->name, linkrate, card->link_pcr);
3482 card->utopia_pcr = card->link_pcr;
3484 card->utopia_pcr = (160000000 / 8 / 54);
3488 if (card->utopia_pcr > card->link_pcr)
3489 rsvdcr = card->utopia_pcr - card->link_pcr;
3491 tmpl = (unsigned long) rsvdcr * ((unsigned long) card->tst_size - 2);
3492 modl = tmpl % (unsigned long)card->utopia_pcr;
3493 tst_entries = (int) (tmpl / (unsigned long)card->utopia_pcr);
3496 card->tst_free -= tst_entries;
3497 fill_tst(card, NULL, tst_entries, TSTE_OPC_NULL);
3500 idt77252_eeprom_init(card);
3501 printk("%s: EEPROM: %02x:", card->name,
3502 idt77252_eeprom_read_status(card));
3506 idt77252_eeprom_read_byte(card, i)
3515 sprintf(tname, "eth%d", card->index);
3518 memcpy(card->atmdev->esi, tmp->dev_addr, 6);
3520 printk("%s: ESI %pM\n", card->name, card->atmdev->esi);
3529 set_bit(IDT77252_BIT_INIT, &card->flags);
3531 XPRINTK("%s: IDT77252 ABR SAR initialization complete.\n", card->name);
3543 static int idt77252_preset(struct idt77252_dev *card)
3552 card->name);
3553 if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
3554 printk("%s: can't read PCI_COMMAND.\n", card->name);
3555 deinit_card(card);
3560 card->name, pci_command);
3561 deinit_card(card);
3565 if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command)) {
3566 printk("%s: can't write PCI_COMMAND.\n", card->name);
3567 deinit_card(card);
3579 IPRINTK("%s: Software resetted.\n", card->name);
3584 static unsigned long probe_sram(struct idt77252_dev *card)
3612 struct idt77252_dev *card;
3627 card = kzalloc(sizeof(struct idt77252_dev), GFP_KERNEL);
3628 if (!card) {
3633 card->revision = pcidev->revision;
3634 card->index = index;
3635 card->pcidev = pcidev;
3636 sprintf(card->name, "idt77252-%d", card->index);
3638 INIT_WORK(&card->tqueue, idt77252_softint);
3643 mutex_init(&card->mutex);
3644 spin_lock_init(&card->cmd_lock);
3645 spin_lock_init(&card->tst_lock);
3647 timer_setup(&card->tst_timer, tst_timer, 0);
3650 card->membase = ioremap(membase, 1024);
3651 if (!card->membase) {
3652 printk("%s: can't ioremap() membase\n", card->name);
3657 if (idt77252_preset(card)) {
3658 printk("%s: preset failed\n", card->name);
3666 printk("%s: can't register atm device\n", card->name);
3670 dev->dev_data = card;
3671 card->atmdev = dev;
3676 printk("%s: can't init SUNI\n", card->name);
3682 card->sramsize = probe_sram(card);
3685 card->fbq[i] = ioremap(srambase | 0x200000 | (i << 18), 4);
3686 if (!card->fbq[i]) {
3687 printk("%s: can't ioremap() FBQ%d\n", card->name, i);
3694 card->name, ((card->revision > 1) && (card->revision < 25)) ?
3695 'A' + card->revision - 1 : '?', membase, srambase,
3696 card->sramsize / 1024);
3699 printk("%s: init_card failed\n", card->name);
3704 dev->ci_range.vpi_bits = card->vpibits;
3705 dev->ci_range.vci_bits = card->vcibits;
3706 dev->link_rate = card->link_pcr;
3711 if (idt77252_dev_open(card)) {
3712 printk("%s: dev_open failed\n", card->name);
3717 *last = card;
3718 last = &card->next;
3728 deinit_card(card);
3731 iounmap(card->membase);
3734 kfree(card);
3775 struct idt77252_dev *card;
3781 card = idt77252_chain;
3782 dev = card->atmdev;
3783 idt77252_chain = card->next;
3784 del_timer_sync(&card->tst_timer);
3788 deinit_card(card);
3789 pci_disable_device(card->pcidev);
3790 kfree(card);