Lines Matching defs:base
1588 u32 start = ranges[i].base;
1971 vdata->clock.offset = tk->tkr_mono.base;
1979 vdata->raw_clock.offset = tk->tkr_raw.base;
2758 * 2) Broken TSC compensation resets the base at each VCPU
5496 .base = user_range->base,
5573 __u32 base;
5610 .base = cr->base,
6909 set_desc_base(desc, (unsigned long)var.base);
6912 *base3 = var.base >> 32;
6934 var.base = get_desc_base(desc);
6936 var.base |= ((u64)base3) << 32;
8705 put_smstate(u32, buf, offset + 8, seg.base);
8724 put_smstate(u64, buf, offset + 8, seg.base);
8750 put_smstate(u32, buf, 0x7f64, seg.base);
8756 put_smstate(u32, buf, 0x7f80, seg.base);
8812 put_smstate(u64, buf, 0x7e98, seg.base);
8822 put_smstate(u64, buf, 0x7e78, seg.base);
8880 cs.base = vcpu->arch.smbase;
8883 ds.base = 0;
9781 sregs->idt.base = dt.address;
9784 sregs->gdt.base = dt.address;
9930 dt.address = sregs->idt.base;
9933 dt.address = sregs->gdt.base;
9989 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10427 cs.base = vector << 12;